Arpad,
Making assumption that "making A_gnd a local reference for a [Component].
" has the following problems.
* The example below has three local reference nodes:
* VREFCA
* VSS
* VSSQ
* I suspect these three are connected together to a single supply
CAD net (e.g. Vref) on the Board
* Note that I use the word CAD net not node, since the power
distribution model on the board, package and die for this supply net can
be distributed with different nodes at different buffers. This is the
concept of bus_lables that represent a single node for multiple buffers.
* For this memory chip, I expect Micron would want to deliver a
power aware coupled model that includes DQ and DQS, and they have a single
reference net (Signal name VSSQ).
* For the controller, Intel might want to deliver a full coupled
model with DQ, DQS and Address Command (ADDCMD) signals that go with.
Intel likely may also have isolated the "reference nets" (Intel and Micron
will likely call this isolating the "grounds"). Passing in A_gnd to this
circuit will not allow the interconnect for the DQ, DQS signals to use a
different reference than the ADDCMD signals.
Making A_gnd a local reference node for either a Model or Component has
its problems. I am leaning to saying A_gnd is an alias for Node 0 (or
simulator node), and stating that A_gnd as a terminal name, or using Node
0 in subckts should be discouraged if the model needs to support Power
Aware simulations that are not "Ground Based" power aware simulations.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
978.461-0449 x 133
Mobile 303.335-6156
From: ibis-interconn-bounce@xxxxxxxxxxxxx
<ibis-interconn-bounce@xxxxxxxxxxxxx> On Behalf Of Muranyi, Arpad
Sent: Wednesday, March 14, 2018 11:06 PM
To: IBIS-Interconnect <ibis-interconn@xxxxxxxxxxxxx>; IBIS-ATM
<ibis-macro@xxxxxxxxxxxxx>
Subject: [ibis-interconn] Re: Another stab at defining A_gnd
Walter,
I think we in "violent agreement". In fact I started to write the same
illustration, using a W-element
and a resistor in my previous reply, but I deleted it because it was
getting too long.
The point I was trying to make is that this word "reference" is sometimes
over used, abused. We often
give it a mysterious, special meaning. But in reality there is really
nothing special about it. It is simply
a node name that is designated for the purpose of voltage measurements.
Whether it is global or
local, or whether it is ground or any other "general purpose" node,
doesn't matter, as long as the
voltage measurements make sense. This is why I was "sensitized" to your
usage of this word in your
text on which I was commenting.
Anyway, that text needs some work. But before we get into that, we need
to agree on the concepts.
Especially after today's Interconnect Meeting. I wonder now what we think
A_gnd is. Is it a local
reference to [Model], to [Component], or what? Or, is it a global
reference, and if so, is it Node 0, or
just a global node name that could be anything other than Node 0? I don't
think we gave an answer
to these questions today, although Mike started to make changes in the
BIRD draft along these lines.
This question about [Model] vs [Component] is bugging my mind now. If it
is a local reference to
[Model], we could have a [Component] with many [Model]s which all have
their own, independent
references. How would that work if several of these [Model]s are
connected to the same package
model that has a single reference? We might have a problem if the
different [Model] references
are connected to different voltages. For this reason I am leaning towards
making A_gnd a local
reference for a [Component]. That seems to be safe, because one package
cannot serve multiple
[Component]s, so all of the buffers and package models within a
[Component] could safely be
referenced to the same local reference node.
Thanks,
Arpad
==========================================================================
===
From: ibis-interconn-bounce@xxxxxxxxxxxxx
<mailto:ibis-interconn-bounce@xxxxxxxxxxxxx>
[mailto:ibis-interconn-bounce@xxxxxxxxxxxxx] On Behalf Of Walter Katz
Sent: Wednesday, March 14, 2018 10:00 AM
To: IBIS-Interconnect <ibis-interconn@xxxxxxxxxxxxx
<mailto:ibis-interconn@xxxxxxxxxxxxx> >; IBIS-ATM
<ibis-macro@xxxxxxxxxxxxx <mailto:ibis-macro@xxxxxxxxxxxxx> >
Subject: [ibis-interconn] Re: Another stab at defining A_gnd
Arpad,
Does not matter if some of this text is in IBIS or an introduction to the
BIRD which clarifies A_gnd as a local reference. The bottom line is IBIS
describes electronically what is in a Data Book, and possibly additional
information that is not in a Data Book that is necessary to do
sufficiently accurate simulations. I am enclosing the Data Sheet for a
part I downloaded from the Micron site.
The table on page six lists the signal names that are reference pins for:
VREFCA Supply Reference voltage for control, command, and
address pins.
VSS Supply Ground.
VSSQ Supply DQ ground.
Your comment
A somewhat more general, but still technical issue I have (especially in
the context of SPICE
elements) is that you talk about ***reference*** too much. Take, for
example, a resistor.
It has two terminals. Why do we need to call its "other terminal"
***the*** reference?
Just confuses the issue. We are using the word "reference" to mean two
different things. When reporting a "voltage" in a measurement or a
simulator it must be measured between two point. One can report the
voltage between the two ends of a resistor, or one can report the voltage
at each end of a resistor to a local "A_gnd", or to a simulator reference
node. This is the first meaning of reference. There is no current flowing
from the resistor to A_gnd or the simulator reference node. Now replace
the resistor with a trace on a PCB, and we want to measure the voltage at
both ends of the trace. There is no difference between making these
measurements in the lab and in a simulation. There is a difference between
a resistor and a W-Line representation of that trace.
Both the resistor and the trace have current flowing through them. The Tx
is sending electrons down the line, how do they get back? Different
simulators make different assumptions about this. Some assume ideal
"return paths" for these electrons to get back to the Tx, or in particular
the rail voltage sources that supply the electrons to the Tx in the first
place. Other simulators may account for the details of how these currents
are returned. I suspect that Scott, Brad, Radek and I will not be able to
agree on how this should be done. I believe that Scott, Brad, Radek and I
can agree that we can write interconnect models according to BIRD 189 that
will satisfy each of our own simulator requirements. The problem is that
Scott, Brad, Radek and I may write these models for our own simulators,
partly because we do not know what the requirements are for the other
simulators. Scott says using Node 0 as the reference for all interconnect
models is valid ("Ground Reference Simulation"). Brad says no, because the
rail interconnect models are different if use the local reference. At this
point all we can ask for is recommendations for how BIRD 189 models should
assign reference terminals. All we can do is to recommend how a model
maker writes models for a component. He may choose to make his models base
on "Ground Reference Simulation", or by using the recommendations that
Brad (or others) may document for us. I think the real problem is Tx
package models, Rx package models, board interconnect models and connector
models can be written with different assumptions. I think it would be
helpful for Brad and others explain the rules that they want followed and
what limitations that they want to impose on the other models in the
channel.
How about a trivial case, an package that has 6 terminals, VDD, VSS and
I/O at the buffer and VDD, VSS and I/O at the pin. Inside of the package
the two VDD terminals are connected with a .1 Ohm resistor, the two VSS
terminals are connected with a .1 Ohm resistor, and the two I/O terminals
are connected with a .3" trace that can be represented by a lossy
transmission line. What would be the recommend SPICE subckt for this
trivial package?
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
978.461-0449 x 133
Mobile 303.335-6156
From: ibis-interconn-bounce@xxxxxxxxxxxxx
<mailto:ibis-interconn-bounce@xxxxxxxxxxxxx>
<ibis-interconn-bounce@xxxxxxxxxxxxx
<mailto:ibis-interconn-bounce@xxxxxxxxxxxxx> > On Behalf Of Muranyi, Arpad
Sent: Wednesday, March 14, 2018 3:23 AM
To: 'IBIS-Interconnect' <ibis-interconn@xxxxxxxxxxxxx
<mailto:ibis-interconn@xxxxxxxxxxxxx> >; IBIS-ATM
<ibis-macro@xxxxxxxxxxxxx <mailto:ibis-macro@xxxxxxxxxxxxx> >
Subject: [ibis-interconn] Re: Another stab at defining A_gnd
Walter,
Thanks for your effort of "stabbing". :)
This is a good start, but has numerous problems, ranging from small
grammatical ones to
large theoretical (philosophical) ones. I feel it will take quite a bit
of effort to clean it up
and get all of us in an agreement.
My general comments are that talking about IBIS history and how it evolved
is not very
spec-like material. Similarly, making promises about what will be done in
future versions
is quite dangerous. Case in point is the forward looking, unsupported
package/interconnect
model examples associated with Figure 29.
On a more technical side, we all know that a voltage is something that can
only exist between
two locations. Your wording: "pins with a zero voltage" and "buffer rail
voltage" are highly
questionable because in my mind they seem to refer to a single point or
location. How can
we say than that a pin or a buffer rail (by itself) has ***a*** voltage?
Voltage can only exist
between "it" and "something else".
A somewhat more general, but still technical issue I have (especially in
the context of SPICE
elements) is that you talk about ***reference*** too much. Take, for
example, a resistor.
It has two terminals. Why do we need to call its "other terminal"
***the*** reference?
Yes, if we think of the resistor as a one-port, we could consider one of
its terminals the
reference terminal. But how many people think of a resistor as a one-port
in a SPICE
netlist context? How is this different from the W-element or S-element,
in which case
we start talking about ports much more readily? I think this difference
comes from how
these circuit elements are used in the netlist. In the case of W and
S-elements, we are
usually interested in their port voltages, and not the voltage differences
between the
various ports (unless differential signaling comes into the picture). On
the other hand,
in the case of a resistor, what we are interested in depends greatly on
how it is placed
into the circuit. It might be the voltage across it, but it could also be
the voltage between
one or the other of its terminals and something else. I feel that we need
a better definition
for what a reference really is, and when and why we might call a terminal
a reference.
I will stop with this, the rest of the text may depend on how we answer
these questions.
Thanks,
Arpad
=====================================================================
From: ibis-interconn-bounce@xxxxxxxxxxxxx
<mailto:ibis-interconn-bounce@xxxxxxxxxxxxx>
[mailto:ibis-interconn-bounce@xxxxxxxxxxxxx] On Behalf Of Walter Katz
Sent: Tuesday, March 13, 2018 9:18 PM
To: 'IBIS-Interconnect' <ibis-interconn@xxxxxxxxxxxxx
<mailto:ibis-interconn@xxxxxxxxxxxxx> >; IBIS-ATM
<ibis-macro@xxxxxxxxxxxxx <mailto:ibis-macro@xxxxxxxxxxxxx> >
Subject: [ibis-interconn] Another stab at defining A_gnd
All,
Here is a discussion and definition of A_gnd based on the presentation and
discussion we had today. I think this could go somewhere in the beginning
of IBIS.
All voltages in IV curve, VT, curves, Measurement Thresholds, Model Spec
voltages in this document are voltage that are either measured in hardware
or simulations reference to an appropriate location in the hardware or
node in a simulation. IBIS originally defined voltage measurements at pins
are measured relative to a reference pin. Data Books usually refer to
these reference pins as "Ground" or supply pins with a zero voltage. As
IBIS has evolved to define rules at the die pad, and with BIRD 189 at the
buffer itself it is necessary to move reference point to the die pad or to
the buffer rail voltage. IBIS defines the reserved name A_gnd to refer to
this location.
Note that "measurement" in this document shall either refer to
1. A physical measurement of a voltage between a probe point and a
reference point
2. A simulation "probe" of a voltage between a probed node and a
reference node.
A connection between two or more I/O buffer models can be defined as an
IBIS-ISS netlist which is essentially a list of IBIS-ISS element
instances. The terminals of these elements can reference nodes for the
other terminals of these elements. There is no requirement that the
reference A_gnd for one measurement on a buffer be the same SPICE node as
the reference A_gnd for a measurement at a buffer either in the same
component or a buffer in a different component.
All data in the specification is based on the assumption that rail
voltages are static. [Pin Mapping] allows the EDA tool to determine which
pin(s) supply the voltages to all of the rail terminals of a [Model], and
therefore all of the references for all of the interconnect between
[Model]s and pins.
Note that in the case of some ECL, MECL, PECL and RS232, IBIS models may
have voltages that are referenced to some point outside of the component.
In this case the reference location (A_gnd) is external to the component,
and the EDA tool must choose a reference node for rail voltages supplied
to the component and for measurements made at the I/O pin, pad or buffer.
This reference "Node 0" is commonly used in this case.
One must take great care in defining reference node connections when doing
Power Aware Simulations. A simulation is a Power Aware Simulation when the
rail voltages referenced to their local reference node or referenced to a
simulator reference node (e.g. Node 0 ) change in time.
Almost every use of the word "ground" in this document refers to a point
in the hardware or a node in a simulation that is the reference for signal
and supply voltage measurements for a Device Under Test. In IBIS 7.0 or
7.1, all of these reference to "ground" will be clarified to mean the
reference point for measurement (A_gnd).
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
978.461-0449 x 133
Mobile 303.335-6156
