[ibis-macro] encryption research
- From: "Mike LaBonte \(milabont\)" <milabont@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Tue, 2 May 2006 12:11:39 -0400
While searching for commercial encryption tools for EDA I I ran across
some interesting info about proprietary encryption.
This paper from the EDA Consortium gives an overview of some uses of
encryption in EDA tools. It appears that most if not all use 2 layers of
encryption. The models are encrypted using a new key each time. Then the
encrypted model and the key are wrapped into an encrypted file for which
the end-user tool already knows the key.
http://www.edac.org/downloads/resources/export/EncryptionInEDA.pdf
Ansoft has the ansip program, which encrypts VHDL files that can then be
read only by their Simplorer simulator. It tried out the encryptor. It
just encrypts the whole file, not really caring what it contains.
John Cooley wrote an article about encryption in hardware design. Of
particular interest is Table 1 "The four current ways of encrypting
designs". Cooley seems to like VMC, a tool that compiles Verilog code to
a PLI written in C, with scrambled names. This combination seems to
create a fairly secure mechanism that still works in any simulator. This
may be similar to the C approach that Arpad mentioned. The PLI interface
was the key to making it work.
http://www.eetimes.com/editorial/1996/edafeature9612.html
Mike
Other related posts:
