[ibis-macro] Re: Question on seeting the EMD direction

  • From: "Walter Katz" <wkatz@xxxxxxxxxx>
  • To: <Arpad_Muranyi@xxxxxxxxxx>, "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Wed, 25 Jun 2008 14:25:34 -0400

Arpad,

You answered the first question correctly:

We are starting to have a need to ***MODEL*** complicated packages, cables,
connectors which can't be described without a good netlisting syntax!

This was my original motivation for proposing EMD.

We can debate the syntax of the original EMD format, but it was intended to
not only represent connectors and simple packages, but complicated packages,
back planes, and motherboards as well.

The scope of this effort is to enable package, backplane, connector and
module manufactures to deliver models that their customers require. They may
choose to implement their own tools to generate these models, or request EDA
vendors to supply them with such a tool.

Walter


-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx]On Behalf Of Muranyi, Arpad
Sent: Wednesday, June 25, 2008 2:01 PM
To: IBIS-ATM
Subject: [ibis-macro] Re: Question on seeting the EMD direction

Mike,

Thanks for your comprehensive summary and comments.

I think you are absolutely right at the end when you
say that ICM was not intended to do A and B.  In fact
the entire IBIS philosophy didn't have that intension
as far as I can tell.  I believe our philosophy was
to provide the models and let the tool do any of the
netlisting.  This makes me wonder, why are we all of
the sudden talking about the need for netlisting?

I guess the answer may be that we are starting to have
a need to ***MODEL*** complicated packages, cables,
connectors which can't be described without a good
netlisting syntax.  (Is this correct)?

But then are we going to limit ourselves to this kind
of MODEL-netlists only, or are we going to need to
generalize and allow (or request) tools to spit out
an entire design (e.g. motherboard) in the future
IBIS-netlist format?  In other words what should be
the scope of this effort?

Thanks,

Arpad
======================================================

-----Original Message-----
From: Mirmak, Michael [mailto:michael.mirmak@xxxxxxxxx]
Sent: Tuesday, June 24, 2008 1:46 PM
To: bob@xxxxxxxxxxxxx; wkatz@xxxxxxxxxx
Cc: Muranyi, Arpad; IBIS-ATM
Subject: RE: [ibis-macro] Re: Question on seeting the EMD direction

Per Arpad's request, here are a few comments on the EMD direction:

1) If we are limiting ourselves to representations of interconnects
(cables, connectors, etc.) convertible to existing proprietary formats,
the elements in the EMD proposal are certainly required.   However, some
types of controlled sources may also be needed for these applications.
For example, tools that convert S-parameters to rational functions by
approximation or fitting often represent the fitted response as a
circuit with controlled sources, even for entirely passive design
elements, such as vias.

If we wish to support generic subcircuits that might result from
rational function approximation of S-parameter data, controlled sources
are a requirement.

2) We should seriously consider support in the near future under EMD of
non-interconnect circuits.  In some cases, behavioral modeling of
buffers is easier with SPICE elements and function-based sources than
with traditional IBIS (leaving multi-lingual IBIS aside, behavioral
SPICE modeling makes continuous sweeping or control of parameterized
variables easy, where traditional IBIS forces generation of new keywords
or model data under [Model Selector]; this was discussed briefly at the
IBIS Summit on the 10th).

3) Let's ensure that we are not undergoing "mission creep."  From the
IBIS-ATM discussions and these reflector exchanges, several needs have
emerged that *some* IBIS-like standard(s) should address:

A) generic, SPICE-like descriptions of system topologies, for exchange
of netlist information between tools
B) generic, SPICE-like wrappers or other representations of existing
interconnect model types
C) flexible SPICE-like modeling of interconnects (cables, connectors,
PCB traces, vias, etc.), including easy support of S-parameter swathing

Note that (A) and (B) are very similar, but are distinct in a subtle
way.  In (A), we are essentially standardizing a description of
node-to-node connections.  What's being connected isn't relevant and
doesn't need to be specified.  This means that new kinds of models can
easily be added, so long as they have some nodal connections to the
"outside world."

(B) is different, and seems to be the current direction of EMD.  A list
of existing "native" model types is assumed, and generic representations
for them are under discussion.  This makes conversion from a generic
format to a tool-specific format easy.  However, it does not necessarily
allow for *new* model types, unless a very generic subcircuit definition
syntax is included.  For example, no "native" element exists for the
broadband interconnect representation proposed by Brad Brim of Sigrity
during his IBIS Summit presentation.  Unless a native element were added
later, it would always have to be included as a generic subcircuit.

Solutions for (A) and (B) do not exist in a standard way today, so EMD
could cover one or both and fill industry needs very well.  Partial
solutions to (C) exist, but as discussed so far, the existing solutions
are not necessarily optimally easy to use or don't cover all of today's
technical needs.  To be more direct, for interconnect-specific modeling
(type (B)), ICM exists and was meant to enable exchange of RLGC and
S-parameter data in a generic way.  It also supplies information on
mapping of matrix data to signal names and nodes. However, it lacks some
fundamental capabilities:

- swathing is not permitted on S-parameter data
- some series elements are not supported at all (i.e., series
capacitances) unless S-parameters are used
- the data format is not compact; for larger components, the file size
can get unwieldy fast, due to newline requirements
- S-parameter and RLGC data cannot be combined in the same interconnect
- section-to-section RLGC coupling within the same line is not supported
(see B. Brim's IBIS Summit presentation)
- the mapping of S-parameter ports (really, pairs of nodes) to netlist
nodes (single physical points) is not clear, particularly on references

The last item has been addressed in a draft change to ICM, but was
placed on-hold until Touchstone 2.0 was resolved.  With the exception of
section-to-section coupling, all the rest of the items can be addressed
with fairly straightforward specification changes.

The key question is whether fixing ICM is worth the effort relative to
creating a more generic format for interconnect modeling that addresses
these issues.

So, is it?  Personally, I believe it is, but only for type (C).  ICM was
not intended to accomplish (A) or (B) and should be supported in any
format that includes (A) or (B).

Comments are welcome.

- MM
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