[ibis-macro] Node "0" in IBIS, IBIS External Model, IBIS Interconnect Models
- From: Walter Katz <wkatz@xxxxxxxxxx>
- To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
- Date: Tue, 5 Aug 2014 09:49:39 -0400 (EDT)
All,
There is currently a debate in the IBIS Interconnect meeting on the
allowed usage of Node "0" in the new IBIS and EBD Interconnect IBIS-ISS
and Touchstone models. There is a vote scheduled on August 13 in IBIS
Interconnect to forbid the use of Node "0" (aka GND, !GND and GROUND) in
IBIS-ISS subckts reference by IBIS interconnect models.
SiSoft does believe that there are circumstances where using Node "0" in
interconnect and I/O Buffer Models is problematic and should be avoided.
The IBIS Interconnect draft BIRDs allow the model maker to create
interconnect circuits without using Node "0", but we also think that the
proposal to forbid Node "0" should be defeated:
We believe that to "outlaw" node 0 would merely remove a convenient
simplification to the circuit equations, forcing an accounting for a bunch
of voltages and currents that don't matter in the first place.
However, this is an important opportunity to understand Node "0" in the
context of the IBIS I/O buffers, so that I/O buffers can be created or
implemented without using Node "0". I will simply point out a number of
places in the IBIS 6.0 specification which explicitly reference SPICE Node
"0" or "GND" ( I am sure I missed a number of cases but this should
indicate the magnitude of the effort to remove the usage of Node 0 in the
IBIS specification, or how to create IBIS I/O buffers that do not use Node
"0"):
1. Page 93, 6.3 Multilingual Model Extensions:
a. A_gnd is a universal reference node, similar to SPICE ideal node
"0." Ports 14 and 15 are only available under [External Model] for
support of true differential buffers.
b. Can multilingual models be written without using A_gnd, and
connect this terminal of the multilingual model directly to a Signal_name
defined in the Component [Pins] list?
c. Also not Page 121, 6.3
i. One
of these port entries must name a reference for the other port (for
example, A_gnd).
d. Also note page 125
i. Ports vcc gnd io1 io2
e.
2. Page 33, 6.1 Model Statement
a. C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, and
C_comp_gnd_clamp are intended to represent the parasitic capacitances of
those structures whose I-V characteristics are described by the [Pullup],
[Pulldown], [POWER Clamp] and [GND Clamp] I-V tables. For this reason,
the simulator should generate a circuit netlist so that, if defined, each
of the C_comp_* capacitors are connected in parallel with their
corresponding I-V tables, whether or not the I-V table exists. That is,
the C_comp_* capacitors are positioned between the signal pad and the
nodes defined by the [Pullup Reference], [Pulldown Reference], [POWER
Clamp Reference] and [GND Clamp Reference] keywords, or the [Voltage
Range] keyword and GND.
3. Page 51, 6.1 Model Statement
a. C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, and
C_comp_gnd_clamp are intended to represent the parasitic capacitances of
those structures whose I-V characteristics are described by the [Pullup],
[Pulldown], [POWER Clamp] and [GND Clamp] I-V tables. For this reason,
the simulator should generate a circuit netlist so that, if defined, each
of the C_comp_* capacitors is connected in parallel with its corresponding
I-V table(s), whether or not the I-V table(s) exist(s). That is, the
C_comp_* capacitors are positioned between the signal pad and the nodes
defined by the [Pullup Reference], [Pulldown Reference], [POWER Clamp
Reference] and [GND Clamp Reference] keywords, or the [Voltage Range]
keyword and GND.
4. Page 56,., Model Statement
a. The effective current table for the Isso_pd current is extracted
by the following process. The buffer is set to "logic zero." A Vtable
voltage source is inserted between the [Pulldown Reference] node and the
buffer as shown in Figure 7. This Vtable voltage is swept from -Vcc
(typical) to +Vcc (typical) and is relative to the [Pulldown Reference]
typ/min/max values for the corresponding columns. The output is connected
to the GND (typical) value as shown in Figure 7.
b. The effective current table for the Isso_pu current is extracted
by the following process. The buffer is set to "logic one". A Vtable
voltage source is inserted between the [Pullup Reference] node and the
buffer as shown below. This Vtable voltage is swept from -Vcc (typical)
to +Vcc (typical) and is relative to the [Pullup Reference] typ/min/max
values for the corresponding columns. The output is connected to the GND
(typical) value as shown in Figure 8.
c. For example, for a typ/min/max [Voltage Range] of 5.0V, 4.5V and
5.5V, and with the negative reference set to GND, the Isso_pu(0) and
Isso_pd(0) values for typ/min/max should be equal to the column values as
shown in
d. Description: The data for these keywords define the resistance
values of Rgnd and Rpower connected to GND and the POWER pins,
respectively, and the resistance and capacitance values for an AC
terminator.
e. Other Notes: [Rpower] is connected to "Vcc" and [Rgnd] is
connected to "GND". However, [GND Clamp Reference] voltages, if defined,
apply to [Rgnd]. [POWER Clamp Reference] voltages, if defined, apply to
[Rpower]. Either or both [Rgnd] and [Rpower] may be defined and may
coexist with [GND Clamp] and [POWER Clamp] tables.
f. Figure 16 illustrates a general configuration from which a
[Rising Waveform] or [Falling Waveform] is extracted. The DUT die shows
all of the available power and ground pin reference voltage terminals.
For many buffers, only one power pin and one common ground pin terminal
are used. The absolute GND is the reference for the V_fixture voltage and
the package model equivalent network. It can also serve as a reference
for C_comp, unless C_comp is optionally split into component attached to
the other reference voltages.
g. Other Notes: Figure 17 documents some expected internal paths
for a useful special case where only one common power pin (VDDQ) and one
common ground exists (GND).
h. The power reference terminal (VDDQ) is usually the [Pullup
Reference], or the default [Voltage Range] terminal. The [Pulldown
Reference] terminal is usually at the GND connection.
i. In most cases six [Composite Current] tables are recommended for
accurate modeling. The first four tables correspond to the recommended
fixture conditions for [Rising Waveform] and [Falling Waveform] tables
(normally 50 ohm loads to Vdd and GND).
j. The [Composite Current] table can be derived from currents
measured at the [Pulldown Reference] (GND) node, but adjusted for the
current flowing through the output pin and at other terminals.
5. There are a number of Figures that include a GND symbols, or a
GND node
a. Examples.
i.
Page 57, 6.1 Model Statement, Figure 7
ii. Page
72, 6.1 Model Statement, Figure 16
6. Page 162 ., 9. Notes on Data Derivation Method
a. Then: Attach a 50 ohm resistor to GND to derive the rising edge
ramp. Attach a 50 ohm resistor to POWER to derive the falling edge ramp.
b. Then: Attach either a 50 ohm resistor or the semiconductor vendor
suggested termination resistance to either GND or the suggested
termination voltage. Use this load to derive both the rising and falling
edges.
Walter
Walter Katz
<mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx
Phone 303.449-2308
Mobile 303.335-6156
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