[ibis-macro] Minutes from the 24 Jul 2007 ibis-atm meeting

  • From: "Mike LaBonte \(milabont\)" <milabont@xxxxxxxxx>
  • To: <ibis-macro@xxxxxxxxxxxxx>
  • Date: Tue, 31 Jul 2007 14:56:05 -0400

Minutes from the 24 Jul 2007 ibis-atm meeting are attached. ARs:

AR: Ian send relevant papers on related IEEE work
AR: Ambrish show voltage scale on impulse wave in presentation
AR: Ambrish send presentation to Mike

IBIS Macromodel Task Group

Meeting date: 24 Jul 2007

Members (asterisk for those attending):
* Ambrish Varma, Cadence Design Systems
* Arpad Muranyi, Mentor Graphics Corp.
* Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
* Doug White, Cisco Systems
* Essaid Bensoudane, ST Microelectronics
  Ganesh Narayanaswamy, ST Micro
* Hemant Shah, Cadence Design Systems
* Ian Dodd
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
* Kumar, Cadence Design Systems
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco
  Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
* Mike Steinberger, SiSoft
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
* Radek Biernacki, Agilent (EESof)
  Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
* Richard Ward, Texas Instruments
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence
  Stephen Scearce, Cisco Systems
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
* Todd Westerhoff, SiSoft
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft

Call for patent disclosure:

No one declared a patent.


Review of ARs:

- Arpad: Review the new macro library files.
  - TBD

- Arpad: Write parameter passing syntax proposal for a possible BIRD
  - TBD

- Todd clarify "electrically isolated" in BIRD
  - TBD

- Michael Mirmak get specific data on the non-linear behavior problem
  - TBD

- Hemant will publish an open source reference model by Jul 17
  - Ambrish will present a model and program today
  - TBD

- Todd send IBIS-ATM Model Validation presentation to Mike
  - Done

- Mike post IBIS-ATM Model Validation to website
  - Done

New Discussion:

- Arpad noted that recent press coverage of our group may have been unclear.
  - Small misunderstanding blown out of proportion
  - Inventing a controversy that does not exist
  - Chinese press may latch onto this
  - We should trigger press coverage on our progress at some point

- Ian brought up Michael Mirmak's work with IEEE 802
  - That committee has about 50 experts
  - Mush of what we are doing has been discussed there
  - Can we get them to provide advice to us?
  - Richard Mellitz has published papers

AR: Ian send relevant papers on related IEEE work

It was noted that we need a title for the BIRD
- It is being refered to frequently, but has no standard name

Ambrish presented Cadence reference Rx model and tool
- This does not model clock recovery
  - Returns ideal bit time
- Have not compiled for Windows yet
  - Could if demand is there on Windows
  - Requires cygwin DLL under current compile process
  - Mike said that compiling with -lmingw statically embeds the DLL
- The SiSoft and Cadence reference models should be checked for consistency
- Todd: we should have one reference model as a standard
- Arpad: is there a way to combine these into one?
  - Hemant: we need to settle on a minimum standard first
- Page 6:
  - Mike S: what is the vertical scale?
    - Voltage over time
  - Kumar: This can be resampled any way you want
  - Mike S: We need to agree on how impulse responses are scaled
  - Todd; Impulse response values usually are in tens of thousands
  - Ambrish: It's gigavolts here
- Page 10:
  - The picture is the inner boundary of an eye diagram
  - Arpad: Does the test program give BER?
    - Ambrish: No

AR: Ambrish show voltage scale on impulse wave in presentation
AR: Ambrish send presentation to Mike

- Bob: These are prototypes to test interoperability
  - What is the availability?
  - We deciced there would be no exclusion within the committee
- Hemant: We need both a test platform and a model

Arpad: When will Cadence samples be available?
- SiSoft tester and Cadence model will be shared first
- Cadence will provide exectuble only, for now

Mike S: There could be operating environment dependencies
- Others may be able to help by testing on their systems

- Source code availability:
  - SiSoft:
    - Need to figure out right source licensing model
    - tester - exe
    - model - exe & dll
  - Cadence:
    - Also need to figure out right source licensing model
    - eventually provide source for both

We should get testing status report from Cadence and SiSoft next week

Next meeting: 31 Jul 2007 12:00pm PT

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