[ibis-macro] Minutes from the 22 July 2008 ibis-atm meeting are attached

From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
Date: Tue, 29 Jul 2008 10:05:00 -0400

Minutes from the 22 July 2008 ibis-atm meeting are attached. ARs:

AR: Todd and Michael M contact Synopsys about HSPICE legal issues
AR: Walter send updated IBIS-Spice document to Mike L for posting

Mike

IBIS Macromodel Task Group

Meeting date: 15 July 2008

Members (asterisk for those attending):
  Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
* Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  David Banas, Xilinx
  Donald Telian, consultant
  Doug White, Cisco Systems
  Essaid Bensoudane, ST Microelectronics
  Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
* Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems


-----
Opens:


--------------------------
Call for patent disclosure:

- No one declared a patent.


-------------
Review of ARs:

- Walter prepare "IBIS SPICE" example
  - Done

- Arpad create example of EBD with [External Circuit]
  - Done

- David Banas report Xilinx position on LTI assumption for SerDes
  - No update

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

We discussed Walter's email on Berkeley SPICE improvements
- Goals:
  - Easy to generate
  - Easy to consume
- Michael M: Assume Synopsys approval still stands.
- Michael M: Do we want to use P element syntax for S-param?
  - This is used to define the ports
  - It is used when collecting S-param data
  - Tools will take care of termination
  - No need to manually connect and disconnect sources
- Walter: Which W element options would not be used?
  - Geometric U model, for example
  - Michael M: The set shown looks good
    - Al Davis pointed out that all element letters are used in SPICE simulators
    - A, B, S, Y, all overloaded or non-standard
    - Tools can translate to their own "alphabet"
  - Michael M: SHould provide a macro function like the Y element for expansion
    - Walter: Could reserve one letter to prefix others: YA, YB, etc.
- Mike L: Would IMIC style TABLE models help?
  - Walter: That gets us away from LTI
- Walter: SiSoft can parse this and translate
  - John: Will have to check on this for Mentor Graphics
- Language conventions such as string lengths should be consistent with HSPICE
  - Todd: Synopsys may be concerned about this
  - It would be called IBIS SPICE, so there would be no conflict
  - Bob: IBIS SPICE may become the defacto standard
  - Michael M: People may ask why get IBIS SPICE when HSPICE is a superset
    - Todd: People will care more about reusability
- Walter: Connector vendors can be confident that circuits using this subset
  will work in many simulators
  - Michael M: Users will care more about consistent simulator output than input
- Arpad: If the element subset isn't sufficient, people will back away
  - Todd: Original IBIS was very rigid
  - Walter: We have gone through quite a few years of Moore's Law

Would material be copied from HSPICE manual?
- Todd/Michal M could contact Synopsys about this
- This needs to be a standalone spec, not a reference to HSPICE
- Michael M: Touchstone is a precedent
- Todd: We should not document how tools handle the data

AR: Todd and Michael M contact Synopsys about HSPICE legal issues

- Bob: Impulse response is not covered by this
- Bob: If we invent a "different" language, validation becomes the issue
  - The first test will be against the simulator used to create the model

AR: Walter send updated IBIS-Spice document to Mike L for posting

Next meeting: 29 July 2008 12:00pm PT

-----------

[ibis-macro] Minutes from the 22 July 2008 ibis-atm meeting are attached

Other related posts: