[ibis-macro] Minutes from the 2 sep 2008 ibis-atm meeting

  • From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Mon, 8 Sep 2008 18:08:16 -0400

Minutes from the 2 sep 2008 ibis-atm meeting are attached: ARs:

AR: Walter send IBIS Interconnect SPICE document to Michael M and Todd

Mike
IBIS Macromodel Task Group

Meeting date: 02 September 2008

Members (asterisk for those attending):
  Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  David Banas, Xilinx
  Donald Telian, consultant
  Doug White, Cisco Systems
  Essaid Bensoudane, ST Microelectronics
  Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
* Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
  Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
* Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems


-----
Opens:

- Arpad suggested we address the question of what EMD/EBD is supposed to solve

--------------------------
Call for patent disclosure:

- No one declared a patent.


-------------
Review of ARs:

- Walter add general assumptinons/rules section to IBIS-SPICE proposal
  - Done

- David Banas report Xilinx position on LTI assumption for SerDes
  - No update

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Walter shared the document "IBIS Interconnect Spice"
- "Interconnect" is in the name because that is the scope.
- This is copied from the HSPICE manual, but the PDF does not copy well.
- Expressions may not contain node names.
- Should we allow named versions of positional values?
  - Vxxx node1 node2 0
  - Vxxx node1 node2 V=0
  - The "variable name equals" format will be allowed but optional.
- Arpad: Is V a correct name?
  - HSPICE allows VOL= and DC=
  - We must use whatever HSPICE defines
- On T element TD= stands for "time per distance"
  - Multiplies L= which defaults to meters
  - Should we support L=?
- The only controlled source documented so far is E
  - Not sure if the E Laplace format is needed
  - Not sure what the E Foster format is
- Most s-param parameters may not be needed
- Not sure if L= value for W element makes sense
- Bob: Is .model included?
  - Yes, but specifically for S and W elements
  - RLGCFILE is used for W element, .model is not used
  - Radek: The table model can also be in an external file
- Arpad: Should we support pole-zero?
  - Walter: Not recommended, but there are some requests for this
  - Our SPICE should support it
- Walter: S param data is transfer function data
  - Fourier transfer functions with real and imaginary
  - Would rather have this than E, F, G, H
  - We could require a Touchstone 3 file
  - E element sometimes used for pole-zero crosstalk modeling
  - Some people like to see pole-zero format for simple analyses
    - It allows for easy comparison of simulators, for example.
- Michael M: We need to decide whether to drop the items in red
  - Red items are probably not needed for interconnect
  - Todd: This conveys what we are asking of Synopsys
  - We could waste time refining this, and then they might turn down our
    proposal anyway.
- Michael M: This just needs cleanup before presentation to Synopsys.
- Whatever we use should be taken literally, not modified.
- The word "HSPICE" should not appear in the document.
- Arpad: Will Synopsys be concerned about their competitors seeing this?
  - Walter: Their competitors already have access
  - Maybe we should not post this on our website yet
  - Michael M: We should at least confirm that this is already online
- Radek: We should clarify for Synopsys what changes we are making.
- Michael M: We should invite Synopsys to attend a meeting
  - Bob: We might include "This was donated by Synopsys"
  - Walter: If we add new things to this it could become "interesting"
    - They may implement the same thing in a different way
    - Todd: Like the macro language, translators can be used
    - Michael M: Our spec should stand alone, no connections to anything else
- Bob: We might want to use a 2008 version as our reference.

AR: Walter send IBIS Interconnect SPICE document to Michael M and Todd

Refining the set of elements for IBIS-SPICE

Next meeting: 09 September 2008 12:00pm PT

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