[ibis-macro] Minutes from the 18 and 25 Nov 2008 ibis-atm meetings
- From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
- To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
- Date: Mon, 1 Dec 2008 17:59:35 -0500
Minutes from the 18 and 25 Nov 2008 ibis-atm meetings are attached.
Mike
IBIS Macromodel Task Group
Meeting date: 25 November 2008
Members (asterisk for those attending):
Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
Brad Brim, Sigrity
Brad Griffin, Cadence Design Systems
* David Banas, Xilinx
Donald Telian, consultant
Doug White, Cisco Systems
Essaid Bensoudane, ST Microelectronics
Fangyi Rao, Agilent
Ganesh Narayanaswamy, ST Micro
Gang Kang, Sigrity
Hemant Shah, Cadence Design Systems
Ian Dodd, Agilent
Joe Abler, IBM
* John Angulo, Mentor Graphics
John Shields, Mentor Graphics
Ken Willis, Cadence Design Systems
Kumar
Lance Wang, Cadence Design Systems
Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
Mike Steinberger, SiSoft
Mustansir Fanaswalla, Xilinx
Patrick O'Halloran, Tiburon Design Automation
Paul Fernando, NCSU
* Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
Ray Comeau, Cadence Design Systems
Richard Mellitz, Intel
Richard Ward, Texas Instruments
Sam Chitwood, Sigrity
Sanjeev Gupta, Agilent
Shangli Wu, Cadence Design Systems
Sid Singh, Extreme Networks
Stephen Scearce, Cisco Systems
Steve Pytel, Ansoft
Syed Huq, Cisco Systems
Syed Sadeghi, ST Micro
Terry Jernberg, Cadence Design Systems
Todd Westerhoff, SiSoft
Vikas Gupta, Xilinx
Vuk Borich, Agilent
Walter Katz, SiSoft
Zhen Mu, Cadence Design Systems
------------------------------------------------------------------------
Opens:
- Mike L can not take minutes next week
- Randy will take minutes
- Plans for upcoming meetings:
- Some members may be unavailable at times in the mext month
- We will meet Dec 2, 9, 16
- There will be no meeting Dec 23 and 30
--------------------------
Call for patent disclosure:
- No one declared a patent.
-------------
Review of ARs:
- Michael M: Send proposal document to Mike LaBonte for posting; also
confirm with Synopsys whether "used by permission" can be used as
the official indicator on relevant documents.
- We have email permission from Synopsys
- Synopsys was concerned over whether we have something finished
- We will need formal documentation when our work comes to a vote
- Michael M will check again, but we should be able to upload
- Arpad: Write parameter passing syntax proposal (BIRD draft)
for *-AMS models in IBIS that is consistent with the
parameter passing syntax of the AMI models
- TBD
- TBD: Propose a parameter passing syntax for the SPICE
- [External ...] also?
- TBD
- Arpad: Review the documentation (annotation) in the macro libraries.
- Deferred until a demand arises or we have nothing else to do
-------------
New Discussion:
Bob: Is the AMI software donation from SiSoft waiting for something?
- The conditions have not yet been agreed on
- We need to have a board meeting
Bob: If we add a B element to IBIS SPICE, is that still part of the agreement?
- Michael M: We only drove a single stake in the ground with Synopsys
- Trying to avoid a catch-22
- We should not set ourselves up for failure by letting the scope creep
- We only discuss interconnect use with Synopsys
- Michael M showed the Goals and Scope page of the proposal
- It does not mention the B element
Arpad: We may have to make limited improvements to C_comp
- Bob: Opposed to a major change in IBIS
- We already abandoned a pole-zero approach
- Michael M had proposed a ladder circuit approach
- Walter's proposal would be a big jump just for C_comp
- Arpad: John had also proposed an approach
- Walter's proposal is more far reaching
- It moves a lot of content outside the IBIS file
- What would be left for IBIS?
Michael M: We need an overhaul
- For RX IBIS only has pin lists with measurements
- The package model is insufficient
- The measurements is insufficient
- All that is left is a pin list
- Mike L: Plug and play is important
- Michael M: Only in post-layout analysis
- Arpad: More and more 1-buffer IBIS models are appearing (serdes)
- Arpad: Will the vendors who support IBIS go along with big changes
- Michael M: They will follow their market segments
- In some segments IBIS is dead
- We need to identify the market segments
- Michael M: One user ended up using pure VerilogA for PCIX
- For analog, AMI may be too complicated
- Arpad: Where does SPICE break down? Why turn to VerilogA?
- Michael M: IBIS was winning when it was seen as the only alternative to
transistor SPICE
- It was much faster
- Adding new stuff to IBIS may be adding more complexity than alternatives
- Flexible languages are open ended, but can be too complicated
- It can be very hard to extract models
- Arpad: Is there a way to achieve freedom without complexity?
- Bob: Only silicon vendors are able provide complex models
- Someone has to be producing this as part of their job
- Radek: We need to consider how this affects VT tables
- We have customers using existing IBIS files
- Michael M's proposal for C_comp looks good enough
- Arpad: Personally, all these little changes reflect IBIS inflexibility
- Mike L: hat Bob is describing is reminescent of IMIC
- Arpad: IMIC table models were for transistors
- We will discuss our direction next week
- People should bring their lists of things that need to be solved
Next meeting: 02 December 2008 12:00pm PT
-----------
IBIS Macromodel Task Group
Meeting date: 18 November 2008
Members (asterisk for those attending):
Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
Brad Brim, Sigrity
Brad Griffin, Cadence Design Systems
* David Banas, Xilinx
Donald Telian, consultant
Doug White, Cisco Systems
Essaid Bensoudane, ST Microelectronics
Fangyi Rao, Agilent
Ganesh Narayanaswamy, ST Micro
Gang Kang, Sigrity
Hemant Shah, Cadence Design Systems
Ian Dodd, Agilent
Joe Abler, IBM
* John Angulo, Mentor Graphics
John Shields, Mentor Graphics
Ken Willis, Cadence Design Systems
Kumar
Lance Wang, Cadence Design Systems
Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
Mike Steinberger, SiSoft
* Mustansir Fanaswalla, Xilinx
Patrick O'Halloran, Tiburon Design Automation
Paul Fernando, NCSU
* Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
Ray Comeau, Cadence Design Systems
Richard Mellitz, Intel
Richard Ward, Texas Instruments
Sam Chitwood, Sigrity
Sanjeev Gupta, Agilent
Shangli Wu, Cadence Design Systems
Sid Singh, Extreme Networks
Stephen Scearce, Cisco Systems
Steve Pytel, Ansoft
Syed Huq, Cisco Systems
Syed Sadeghi, ST Micro
Terry Jernberg, Cadence Design Systems
Todd Westerhoff, SiSoft
Vikas Gupta, Xilinx
Vuk Borich, Agilent
* Walter Katz, SiSoft
Zhen Mu, Cadence Design Systems
------------------------------------------------------------------------
Opens:
- None
--------------------------
Call for patent disclosure:
- No one declared a patent.
-------------
Review of ARs:
- Michael M: Send proposal document to Mike LaBonte for posting; also
confirm with Synopsys whether "used by permission" can be used as
the official indicator on relevant documents.
- TBD: This is linked to a previous AR to get Synopsys permission in writing.
- The email from Synopsys is not sufficient, per GEIA.
- Walter: Confirm whether SiSoft donation is still planned.
- Walter reported by email that the offer is still good
- Arpad: Write parameter passing syntax proposal (BIRD draft)
for *-AMS models in IBIS that is consistent with the
parameter passing syntax of the AMI models
- TBD
- TBD: Propose a parameter passing syntax for the SPICE
- [External ...] also?
- TBD
- Arpad: Review the documentation (annotation) in the macro libraries.
- Deferred until a demand arises or we have nothing else to do
-------------
New Discussion:
Status of IBIS AMI file parser:
- Michael M: We are drawing up a bid packet now.
- The packet has to be ready before end of year.
- May not have time to include AMI.
- Arpad: Is the SiSoft parser a DLL?
- Walter: It is written in C, can be any kind of executable
- This will only parse .ami file, not check DLL
- Arpad: Are we allowing the AMI parser source to be used in tools?
- Michael M: Yes, this would be part of the donation agreement
- Walter: Parser code has been owned by IBIS, available with fee
- Bob: The time/complexity tradeoff has not been made yet
Bob: There might be a reflector email asking about V-T tables in AMI
- Walter: This may be a perception problem about AMI
- AMI reads RX signals at the pad
- Michael M: The TX final stage can be represented with AMI
- Walter: But the AMI part consume the impulse response, not generates
- There was an effort to define an IBIS LTI model
- Bob: There may be plenty of discussion on the list
- Walter: There may be confusion about separating the analog and algorithmic
- Arpad: The buffer may not be fast enough to be useful for channel
characterization
- Walter: No simulators can generate an impulse response directly
Michael M: Summary of IBIS Summits in Asia
- There were about 140 attendees in China, 160 in Japan
- There was reduced time for questions
- Great papers were presented and good discussions were held
- Bob: Full range of IBIS topics was discussed
- AMI, EBD, smoothing, quality, estimation of low BERs etc.
- Randy: One paper on solving single VT
- Michael M: There was a proposal for eye masks
- Walter: Michael M had proposed any number of vertices for masks
- New proposal has only 6 sides, diamond shaped
- Some assumptions of symmetry
- Walter: We need to consider how JEDEC specifies eye masks
- All industry standards, not just JEDEC
Status of C_Comp modeling enhancements:
- Summary of proposals:
- Walter: Final_Stage subckt definition, external, connects B element to pad
- Fangyi: Equation based
- Michael M: RC Ladder structure
- John: Existing [External Circuit]
- Arpad: Equation based is probably more engine related
- Walter: Another flavor of the MM approach
- Arpad: MM asked "Are we building mansion-style extensions on a shack?"
- Walter: We still have to define the language
- We can add equation based elements
- Arpad: It may be hard to implement equations in some engines
- Walter: The element can be a black box
- Arpad: C_comp seems simple, but is growing into a monster
- Walter: It is a choice between a fast solution and long term
- Bob: There needs to be a compatible solution
- No tool would be able to support Interconnect SPICE
- Walter: Interconnect SPICE would be LTI, Buffer SPICE would not
- EDA vendors will negotiate the SPICE subsets
- Arpad: Would prefer to have one IBIS SPICE
- Walter: Interconnect SPICE is just the LTI subset
- Radek: Tools will have a tough time judging LTI
- Radek: Models usually have fixed topology
- People can put anything into new models
- Arpad: How do we decide?
- John: Circuit based is easy, and achievable soon
- Arpad: We are somewhat waiting for Synopsys on SPICE
- Michael M: This has "mission creeped"
- We have overlapping expansion mechanisms
- We should start from scratch
- Solutions we have implemented quickly have not been implemented quickly
- Walter: AMI was adopted quickly
- Walter: This is not the "Restructure IBIS Committee"
- We formed for Advanced Modeling
- Michael M: If restructuring and advance compete, vendors will have to
choose
- Arpad: Parallel efforts may give us short and long term solutions
- Michael M: Ideas easily written up can be hard to implement
- Walter: We can start by eliminating 90% of IBIS, build on that
Next meeting: 25 November 2008 12:00pm PT
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