[ibis-macro] Minutes from the 18 Nov 2014 ibis-atm meeting
- From: Mike LaBonte <mike@xxxxxxxxxxx>
- To: 'IBIS-ATM' <ibis-macro@xxxxxxxxxxxxx>
- Date: Tue, 25 Nov 2014 15:01:21 -0500
Minutes from the 18 Nov 2014 ibis-atm meeting are attached.
Mike
IBIS Macromodel Task Group
Meeting date: 18 November 2014
Members (asterisk for those attending):
Altera: * David Banas
ANSYS: * Dan Dvorscak
* Curtis Clark
Avago (LSI) Xingdong Dai
Cadence Design Systems: Ambrish Varma
Brad Brim
Kumar Keshavan
Ken Willis
Ericsson: Anders Ekholm
IBM Steve Parker
Intel: Michael Mirmak
Keysight Technologies: * Fangyi Rao
* Radek Biernacki
Maxim Integrated Products: Hassan Rafat
Mentor Graphics: * John Angulo
* Arpad Muranyi
Micron Technology: * Randy Wolff
Justin Butterfield
QLogic Corp. James Zhou
Andy Joy
eASIC Marc Kowalski
SiSoft: * Walter Katz
* Todd Westerhoff
* Mike LaBonte
Synopsys Rita Horner
Teraspeed Consulting Group: Scott McMorrow
Teraspeed Labs: * Bob Ross
(Note: Agilent has changed to Keysight)
The meeting was led by Arpad Muranyi.
------------------------------------------------------------------------
Opens:
- None
--------------------------
Call for patent disclosure:
- None
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Review of ARs:
- Arpad send presentation from last week to Mike for posting.
- Done, no announcement yet.
- This has updates made during the meeting.
- Arpad send Double Quote BIRD draft to open forum.
- Done
- Arpad: There was no discussion in the last meeting,but we can still discuss.
- Todd produce slides for co-optimization requirements discussion.
- In progress.
- Arpad to review IBIS spec for min max issues.
- In progress.
-------------
New Discussion:
C_comp:
- Arpad:
- We have three options:
- BIRD 79 or derivatives.
- Walter's Final Stage Subckt.
- Arpad's Define Compensation Location.
- Radek: We should avoid the term "compensation location".
- We should talk about what is included instead.
- Arpad: That is a good point.
- We were discussing die pads and metalizations.
- With buffers being separated from die interconnect there is a question
about what is in C_comp.
- Bob: Some of it might be lumped into C_comp.
- My understanding is that the V-T curves are at the C_comp point.
- Agree with Radek.
- V-T compensation looks like a nullification of C_comp.
- Walter: Agree with Radek.
- We might want to explore T-coils.
- The intent of those is to reduce the effect of C_comp.
- There might be a large C_comp at the buffer, but the T-coil reduces that at
the pad.
- That might help us decide how to move forward.
- Bob: We have a terminator RC network.
- Arpad: It doesn't have a threshold, can't be used for measurement.
- The issue is C_comp not changing with frequency.
- Bob: The RC might be added in parallel to C_comp.
- The alternative is to use SPICE.
- Radek: Using RC would be a partial solution.
- Bob: We would have to remove restrictions.
- Walter: For DDR4 ESD just an RC in parallel will do.
- Randy: To match frequency range we might want other elements.
- Arpad: Would s-parameters do?
- Walter: Yes, that would handle anything linear.
- Randy: BIRD 79 puts more burden on the model maker to characterize.
- Arpad: Which of the other two would be better.
- Randy: If we use ISS we still need to define the compensation point.
- Walter: ISS would support Touchstone.
- Moving the compensation point around is complicated.
- We should say the V-T curve is at the pad.
- Bob: It depends on on-die interconnect complexity.
- Walter: There is not much crosstalk coupling for on-die interconnect.
- We can talk about on-die mostly for power distribution.
- Bob: We should define on-die outside of the buffer model.
- Walter: We should consult with Brad Brim about that.
- There is a question about how to handle local power and grounds.
- I'm not defending the syntax I've proposed.
- Bob: The final stage is outside the B-element but it can have series and
shunt portions.
- Arpad: The B-element has it's own C_comp compensation.
- I would prefer a defined topology.
- Walter: It is between the legacy B-element and the die pad.
- Randy: We may have to replace C_comp.
- We can't separate out capacitance.
- Walter: Then C_comp would be zero.
- Should we allow final stage subckt and non-zero C_comp?
- Arpad: The tool will have to figure out an algorithm.
- We would end up with a subckt equivalent in the B-element.
- Walter: There would be two terminals, plus terminals for reference voltages.
- Bob: Walter's idea has merit.
- The B-element terminal waveform has to be used for compensation.
- Arpad: We would end up with 6 terminals:
- in and out, and four references.
- Walter: Differential adds two nodes.
- But not all of them are needed.
- Arpad: Should we use Walter's draft or start from scratch?
- Walter: We should have this discussion in the interconnect group before
deciding.
- This discussion should be moved to that group.
- We would want to keep on-die interconnect out of the final stage.
- Some on-die interconnect should be part of the model.
- Arpad: If multiple buffers are present the on-die interconnect can't be in
the models.
- Randy: Agree.
- Walter: I think that would work.
Redriver Flow BIRD:
- Walter: There is no new progress to discuss.
Meeting schedule:
- Arpad: There is no conflict in November
- The beginning of December is usually OK too.
- We will meet next week.
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IBIS Interconnect SPICE Wish List:
1) Simulator directives
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- » [ibis-macro] Minutes from the 18 Nov 2014 ibis-atm meeting - Mike LaBonte
