[ibis-macro] Minutes from the 11 and 18 Aug 2009 ibis-atm meetings

  • From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Wed, 19 Aug 2009 18:54:33 -0400

Minutes from the 11 and 18 Aug 2009 ibis-atm meetings are attached.

Mike
IBIS Macromodel Task Group

Meeting date: 18 August 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
* Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
* Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris McGrath, Synopsys
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, consultant
  Jerry Chuang, Xilinx
  Joe Abler, IBM
  John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
* Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
  Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
  Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Komow, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
  Todd Westerhoff, SiSoft
* Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

Bob: We should discuss AMI specification clarification
- The parser developer has raised a number of questions about .ami files
- Walter: This should be emailed to the list
- Arpad: We need to address this at another time
  - The agenda for today is full and key participants are here

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Walter send updated IBIS-ISS to Mike L
  - Done

- Mike L post IBIS-ISS to website and email open forum
  - Done

- Arpad send updated IBIS-ISS presentation to Walter
  - TBD

- Mike change web page to make items easily linkable
  - TBD

- Arpad write a BIRD to clarify time period accuracy requirements
  - TBD

- Todd: Write IBIS s-param BIRD
  - No update

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Walter presented the SiSoft proposal for Tx_GetWave input clarification:
- Slide 1:
  - IBIS 5.0 does not support non-LTI TX models
  - Arpad: We are not talking about analog, right?
    - Walter: right
- Slide 2:
  - Input to Tx_GetWave is stimulus convolved with channel
    - This is incorrect
- Slide 4:
  - Kumar: This may not be convolved with the bit stream
- Slide 5:
  - Changing the order of evaluation solves non-LTI problems
- Slide 6:
  - Non-LTI examples: duty cycle distortion and n-tap table lookup buffer
- Slide 7:
  - Walter corrected a typo
- Slide 8:
  - Table lookup output has no linear relationship to input
  - Tx_GetWave is unable to reconstruct the original bit pattern from the
    analog input waveform
  - The equalized pattern bears no resemblance
- Slide 9:
  - Duty cycle distortion has pattern shifted 1 bit
- Slide 10:
  - This is similar to IBIS [Driver Schedule], used for two-tap pre-emphasis
    buffers
- Slide 12:
  - 75% duty cycle dist means each segment is a different number of time steps
  - Fangyi: Shouldn't the first one be 6 steps, not 7?
  - Walter explained DCD calculation
- Slide 13:
  - This proves that DCD is non-LTI
  - IBIS 5.0 With or without DCD, Tx_GetWave gets the same input signal
  - Another effect is DCD amplification, which is too involved to show here
- Slide 14:
  - Tx_GetWave needs to receive a digital stimulus pattern
  - The digital signal is either below 0 or above it, swinging -0.5 to +0.5
- Slide 15:
  - IC vendors currently use digital patterns for their models

Kumar: non-LTI is not the right terminology
- The bit stream is a continuous waveform
- It can have amplitude distortion
- This is nit-picking that will cause confusion
- Walter showed slide 5
- Walter: Tx_GetWave input would have channel distortion
- Kumar: Tx_GetWave just adds equalization
- Walter: But that is at the beginning of the channel, not the end
  - If Tx_GetWave is non-LTI you can't add it there
- Kumar: The order of convolution does make a difference with non-LTI
  - The bit generator should be able to add DCD
  - There should be no confusion about where the DCD is added
  - System jitter would appear in the bit stream
- Walter: Why can't Tx_GetWave accept just transition times?
- Kumar: The time should not be fixed, there can be jitter
- Walter: The times can be anything, not constrained by bit time
- Fangyi: Why have the simulator add jitter?
- Walter: The simulator should have the choice
- Kumar: If we go that way, 0/1V would be better than +/-0.5
- Walter: We mostly work with differential signals
- Fangyi: There are 2 problems here
  - Who is responsible for jitter
  - What is a non-linear TX
- Walter: TX_Init stores the analog impulse
  - Tx_GetWave combines that
- Kumar: We should not do that
- Walter: Tx_GetWave produces the input to RX_GetWave
- Kumar: That is an unnecessary restriction
- Fangyi: That should be up to the EDA tool
- Walter: This is the BIRD SiSoft will introduce
- Fangyi: The TX needs to have a 1 or 0 input?
- Walter: Unlike the RX, the TX has a digital input
  - Simulators have chosen different methods to convey it
  - You could give just a list of times
- Kumar: Agree with Walter that TX_G output is the bit generator
- Walter: No it isn't
- Kumar: This is just the way SiSoft works today
- Walter: IC vendor models work this way
- Kumar: We should not be convolving
- Walter: Why is TX_Init convolved?
- Kumar: I should have the option to use circuit simulation, not convolution
- Walter: That would be a new BIRD, this is about making the current setup work
- Fangyi: There is no current requirement to convolve in Tx_GetWave
- Walter: We can add a switch to say if Tx_GetWave convolves
- Kumar: Agree
- Walter: Tx_GetWave is only needed for non-LTI
  - Tx_GetWave only needs to support non-LTI
- Kumar: The channel is passive, not non-LTI
  - Analog channels are a different beast
  - NMOS drivers are non-LTI
- Walter: It would be better to have objections in writing

Fangyi: Is this proposal backward compatible?
- Walter: No, there will be a version 2 AMI
  - It will have digital stimulus
- Bob: The stimulus is analog
- Walter: The BIRD will call for digital
  - Tx_GetWave only works for LTI
  - But then it is not needed
- Fangyi: So analog stimulus models would not be supported?
  - Walter: Those would be version 1 AMI models
- Bob: Most vendors want backward compatibility
  - SiSoft is free to submit a BIRD on it's own
  - Compatibility is a fundamental IBIS requirement

Walter: We made a serious mistake with the AMI design:
- Bob: Ideally we will have consensus in this subcommittee
- Arpad: We can discuss this
  - Will the BIRD be submitted directly?
- Walter: I will explain equalization next week
- Arpad: Is that a separate BIRD?
- Walter: We don't want to have too many BIRDs
  - Getting this working has been painful
  - It may be better to identify all deficiencies and write a new AMI
- Bob: it is a dangerous process to abandon what we have done
  - Not sure how this impacts other vendors
- Walter: What vendors do we have?
  - SiSoft, Agilent, Sigrity, Cadence, Mentor
  - They should all participate
- Arpad: These things should all be written up
- Walter: I will not write BIRDs for each item
- Arpad: Should we have more presentation style discussions?
- Walter: I have slides for other topics

Next meeting: 25 Aug 2009 12:00pm PT

--------

IBIS Interconnect SPICE Wish List:

1) Simulator directives
IBIS Macromodel Task Group

Meeting date: 11 August 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
* Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris McGrath, Synopsys
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
  Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, consultant
  Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
* Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
  Michael Mirmak, Intel Corp.
  Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Komow, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
  Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Walter investigate requirement for DC= on V element
  - It is optional

- All please send any other feedback on IBIS-ISS by email to Walter
  - Some had trouble opening the document

- Arpad send updated IBIS-ISS presentation to Walter
  - TBD

- Mike change web page to make items easily linkable
  - Some progress last week, but not done yet

- Todd ask Synopsys about public posting of the document
  - Walter: Todd reports that we have permission
    - Not completely sure that all points have been considered
    - We may need to clean up the copyright references
    - It can be posted as a working document, however

- Arpad write a BIRD to clarify time period accuracy requirements
  - TBD

- Todd: Write IBIS s-param BIRD
  - No update

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

We discussed Arpad's written review of IBIS-ISS:

1)  Overview:  "The IBIS Open Forum ... proposes"?
- This was left as-is.
- Randy: "Subckts" could be spelled out
- Bob: Put parentheses around "IBIS-ISS"
- Bob: We should avoid "standardization"
  - IBIS is a "specification", for example, not a standard
- We eliminated the subtitle.
2)  "May which to have a more limited set of characters."
    on pg. 6 doesn't make sense.
3)  "The first character in every line specifies how IBIS-ISS interprets the 
remaining line. "
    on pg. 10 incorrect English.
4)  Reference error on pg. 11
5)  "except in sub-circuits where instance names begin with X" 
    on pg. 11 is wrong...
- We fixed the language there
6)  Are scale factors case sensitive? pg. 12.
- Walter: No
- The difference between columns 1 and 3 is not apparent at first.
7)  "definitioneven" spelling error on pg. 13
- Fixed
- Eliminated reference to functions, which we do not support
8)  "When you select design parameter names, be careful to avoid conflicts with 
parameterized libraries."
    is impossible.  What are the scoping rules if it does happen?
- Walter: We do not support global parameters
- Arpad: It says we do not "recommend" them; they should be avoided
9)  "Traditional SPICE includes the basic sub-circuit, but does not provide a 
way to consistently name nodes. However, IBIS-ISS provides a simple method for 
naming subcircuit nodes and elements: use the subcircuit call name as a prefix 
to the node or element name."
    needs examples on pg. 14.
- This was deleted
10) "To delimit expressions, use single or double quotes." on pg 13
    conflicts with "To invoke the algebraic processor, enclose a complex 
expression in single quotes. "
    on pg. 17
- Arpad: There is a conflict between pages 13 and 17
- We changed it to support only single quotes, not double
11)  Unfinished sentence on pg 17:  "A later definition changes its value, or "
Eckhard: On page 20 need to add "in which the ..."
12)  pg. 22 talks about global parameters but doesn't explain how
     to make one as opposed to a local parameter.  Also, I don't see
     any scoping rules to explain what happens with parameter definitions
     in subcircuits.
- We removed this
- Walter added descriptions of how to define parameters
- Some discussion of whether instance call X=0 overrides .param X=3
13)  "Floating power supply nodes are terminated with a 1 megohm resistor and a 
warning message"
     on pg. 25  I didn't know a message can terminate circuit elements...  :-)
- We eliminated the "floating ... 1 meg resistor"
14)  pg. 26  "The first line of a netlist is always a comment"  doesn't
     apply to us, since we are only subcircuits.
- Deleted: we don't have netlists
15)  "Figure 40" on pg. 31 what is the figure?
- This was deleted
16)  There are references to page numbers which don't exist. on pg. 33-34
- Example: reference to page 96 on page 32 to describe W element matrices
  - Arpad: Should we have this at the end?
  - Walter: We did not include details like this in ICM
    - It is common knowledge

Arpad: Should we resolve the open questions here or in open-forum
- Walter: We should post it for comment
- Bob: We can post on the ATM website and tell the open forum

AR: Walter send updated IBIS-ISS to Mike L
AR: Mike L post IBIS-ISS to website and email open forum

Walter showed his IBIS-AMI proposal presentation:
- Convolving analog impulse response with input stimulus to send to Tx_GetWave
  does not handle non-LTI Tx_GetWave or inter-symbol interference
- TX_Init and Rx_Init should simply return waveforms, not convolve
  - Tools can easily convolve themselves
- Kumar: Non-LTI should not be a problem
  - Duty cycle distortion and post-processing can be handled
- Walter: Disagree
- Kumar: There is too much software investment to make changes
- Walter: Proof is needed that Tx_GetWave needs a digital input
- Arpad: There seems to be an issue over the terminology of "digital waveform"
- Walter: So far only SiSoft has released Tx_GetWave models
- Bob: Kumar could prepare a presentation to make his point next week
- Arpad: We need to have these points explained precisely so everyone can 
understand

Next meeting: 18 Aug 2009 12:00pm PT

--------

IBIS Interconnect SPICE Wish List:

1) Simulator directives

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  • » [ibis-macro] Minutes from the 11 and 18 Aug 2009 ibis-atm meetings - Mike LaBonte (milabont)