[ibis-macro] Minutes from the 10 Jan 2012 ibis-atm meeting

  • From: Mike LaBonte <mike@xxxxxxxxxxx>
  • To: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx>
  • Date: Wed, 11 Jan 2012 13:18:24 -0500

Minutes from the 10 Jan 2012 ibis-atm meeting are attached.

IBIS Macromodel Task Group

Meeting date: 10 Jan 2011

Members (asterisk for those attending):
Agilent:                    * Fangyi Rao
                              Radek Biernacki
Altera:                     * David Banas
Ansys:                        Samuel Mertens
                            * Dan Dvorscak
                            * Curtis Clark
Arrow Electronics:            Ian Dodd
Cadence Design Systems:       Terry Jernberg
                            * Ambrish Varma
                            * Feras Al-Hawari
Celsionix:                    Kellee Crisafulli
Cisco Systems:                Ashwin Vasudevan
                              Syed Huq
Ericsson:                     Anders Ekholm
IBM:                          Greg Edlund
Intel:                        Michael Mirmak
LSI Logic:                    Wenyi Jin
Maxim Integrated Products:    Mahbubul Bari
Mentor Graphics:            * John Angulo
                              Zhen Mu
                            * Arpad Muranyi
                              Vladimir Dmitriev-Zdorov
Micron Technology:            Randy Wolff
NetLogic Microsystems:        Ryan Couts
Nokia-Siemens Networks:     * Eckhard Lenski
QLogic Corp.                * James Zhou
Sigrity:                      Brad Brim
                              Kumar Keshavan
                              Ken Willis
SiSoft:                     * Walter Katz
                              Todd Westerhoff
                              Doug Burns
                            * Mike LaBonte
Snowbush IP:                  Marcus Van Ierssel
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group:   Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                              Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla

The meeting was lead by Arpad Muranyi


- Arpad: Reminder: we will not meet the week of the DesignCON summit

Call for patent disclosure:

- None

Review of ARs:

- Walter submit updated BIRD 123 to Open Forum
  - This is 123.2
  - This was emailed again today after trouble with the first email

- Arpad update analog model overview
  - Done

- Arpad send updated Usage Out Fix BIRD to Mike for posting

New Discussion:

Arpad showed the Usage Out BIRD draft:
- Arpad: No comments have been received
- Bob: There is a new line about Corner not being allowed with Usage Out
- Arpad: That was explained previously
- Bob: Note 8 should have the Corner restriction added
- Arpad: That item is not where it belongs
- Bob: It should be somewhere in that synopsis
- Arpad added the Corner restriction at item 10
- Ambrish: I did not see a notice that this was posted
  - What were the changes?
- Arpad showed the changes side-by-side
- David: What is the reason for the Corner restriction?
- Arpad: The Corner selection is made in the EDA tool
  - It is not appropriate for the model to declare Corner

Bob motioned to submit the Usage Out BIRD with changes to the Open Forum
- Ambrish seconded
- No one objected
- The motion was approved

AR: Arpad submit Usage Out BIRD with changes to the Open Forum

Arpad showed Walter's summary of analog model proposals:
- Walter: In the future we want to handle more than 3 corners
  - It is best to not do this on IBIS with it's fixed 3 columns
  - The parameter tree format is flexible enough for this purpose
  - ISS is an LTI language
  - We need BSS with buffer models
- Arpad: This could be used for general purpose IBIS
- Walter: That may be true
  - We also have to interface with package models
  - Sometimes they are assigned to groups of pins
  - We need a model connection protocol with parameter passing
  - In general the pins will have the same model, except for length
  - Everything in the Model section can go into the tree structure
  - IBIS 6.0 could be a parameter format IBIS
  - C_comp could be Corner or Range
- Arpad: The tree format is not related to these technical discussions
  - It could be done easily, on autopilot
  - The editorial committee could do it
- Bob: The editorial committee is overloaded
- Feras: The current IBIS syntax can be extended to have more corners
- Walter: The C_comp discussions tell us how difficult that has become
- Arpad: A user defined section would allow updates any time
- Ambrish: It would be necessary to support both formats
- Walter: A conversion from old to new would be easy
  - There would be some choices like whether how to convert C_comp
  - It would be easier to do the analog BIRD
- Ambrish: We need the analog BIRD before IBIS 6.0
- Arpad: What in these BIRDs could not be done easily?
- Feras: The current syntax has the interfaces between parts well defined
- Bob: I would prefer this be a new standard, not IBIS
  - We showed an XML version at one point

Walter showed an email describing a parameter tree interconnection format:
- Arpad: This would delay our progress
  - We need the analog capabilities soon
- Walter: There are new advantages
  - Portions can be in external files
- Feras: The current syntax can point to external files
  - Not opposed to the new idea, but concerned about time
- Ambrish: This might take months to years to reach consensus
- Arpad: This would be more machine readable
  - How ready are tool makers to throw out their existing parsers?
- Arpad: The corner limit could be solved using external files
- Walter: Many parameters can be tied to process corner
- Feras: If it can be solved in one format it can be solved in the other

- Walter: BIRDs 118 & 116 will work fine
  - There should be 3 pre-defined subckts
  - information could go into them automatically
- Feras: With external model we don't need new constructs
- Walter: 99% of models use Touchstone
  - Short cuts to those are needed
- Feras: We should not be limited to pre-defined subckts
- Arpad: These would not limit anything
- Walter: What would be wrong with 3 intrinsic subckts?
- Fangyi: It would not be neutral
- Walter: It would work in every tool that implements the spec
- Arpad: The same Supporting_Files can be used by thousands of models
- Feras: [External Model] can do this easily
- Ambrish: We could have example circuits
- Walter: They have to be reserved so they need not be supplied
- Arpad: This would preclude having an external subckt of the same name

Meeting ended.

Next meeting: 17 Jan 2011 12:00pm PT

Next agenda:
1) Task list item discussions

IBIS Interconnect SPICE Wish List:

1) Simulator directives

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