[ibis-macro] Minutes from the 03 & 10 Mar 2009 ibis-atm meetings

  • From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Tue, 17 Mar 2009 14:54:22 -0400

Minutes from the 03 & 10 Mar 2009 ibis-atm meetings are attached.

Mike
IBIS Macromodel Task Group

Meeting date: 10 March 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
* David Banas, Xilinx
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Jerry Chuang, Xilinx
  Joe Abler, IBM
  John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
* Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
* Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Todd: invite Synopsys to join us for a syntax review
  - TBD

- Walter: send updated IBIS Interconnect SPICE proposal to Mike L for posting
  - Done

- Mike L: post updated IBIS Interconnect SPICE proposal 
  - Done

- Todd:   Start a BIRD for IBIS s-params
  - TBD

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Walter showed TstonefileBird.doc :
- A number of issues remain in this document
- The statement of the issue invokes broadband analog models
- This adds the Tstonefile parameter to [Model]
- The expected use is Tstonefile on both sides of the channel
- Impulse response for AMI is TXTstone+channel+RXTstone
- The TxTstonefile converts an impulse to buffer output
- Arpad: So this is separate from the channel model?
  - Walter: Yes, the package models are in the channel
- Walter: IBIS does not model differential capacitance
  - The Tstonefile can do this
- Fangyi: Is RX grounded when we measure?
  - Walter: Ground for Tstonefiles is a "political" topic
  - Todd: The question is if it is measured differentially or single ended
  - Walter: it can be differential or single-ended
- Arpad: Will this allow differential coupling?
- Todd: Does a Tstone file declare what kind it is?
  - Walter: You have to read a whole TS1 file to inspect the contents
    - TS2 has more info
  - Todd: The intent is for IBIS to point to a TS file and know what to do
  - Walter: For TS1 files some info has to go into IBIS
    - This is not specified yet
    - The IBIS tool has to look into the file to see if it is TS1 or TS2
- Walter: We need to handle more corners than just typ/min/max

- Bob: Should we flag if a call is intended for single ended or diff or both?
  - Arpad: AMI accepts only one or the other
- Fangyi: How do we connect this to the GetWave function?
  - Walter: We don't, this is input to Init, not GetWave

- Arpad: The [Model] keyword is inherently single ended
  - We added a few exceptions
  - There will be a lot of rules and exceptions around this
  - Is [Model] not the best place for this new parameter?
    - Maybe a new keyword is better
  - Walter: It could be a [Tstonefile] keyword
  - Todd: There could be another Model_type to allow this
    - Walter: That limits the uses of Tstonefile
      - The type could be something like SerDes_RX
      - If a Tstonefile is there it should be used
      - You could have an HSPICE model, this is similar
    - Todd: If there is any problem, a plain B element would be the fallback
  - Bob: The separate keyword should work well
    - Walter: This also can solve the corners problem

- Todd: [Model] requires parameters that aren't really needed
  - Like Vinl/Vinh for serdes
- Todd: If we have [TStonefile] with no [Model] backup, s-param is required
  - The only option is a linearized model of the s-param
- Bob: We could have [Model] with no data except Tstonefile
  - It could have phony [Ramp]
- Arpad: This is adding baggage to IBIS
- Bob: It probably would be read by a new simulator anyway
  - The [Pin] map is useful "baggage", however

- Arpad: We should provide a fallback for simulators that don't handle 
Tstonefile
- Walter: The only simulator without s-param support is Berkeley SPICE
- Mike L: How about a Fallback_model parameter for [Tstonefile] keyword?
  - Todd: The we would have unreferenced [Model]s
  - Mike L: The new reference is a reference, and should be counted

- Arpad: Editorial change, do we need repetition?
  - Walter: It doesn't hurt to be redundant

- Bob: We should restrict this to 2 or 4 ports, not N ports
  - We don't know how the s-param is generated
  - Walter: S-params can be combined without simulation
  - Todd: You derive it any way you can

- Arpad: Will these be created for AMI only?
  - It is not clear how to connect and ground s2p vs s4p
  - Walter: Ground is meaningless for s-params
  - Todd: The return path is embedded in the s4p
    - Do we need the other half of the s4p?
    - How do we reasonably excite the circuit?
  - An s4p is replaced with 2 s2ps for single ended mode
- Arpad: Is this in series, or a pad to ground shunt?
  - Walter: It is between an ideal source and the pad
- Todd: Why bother with the ideal source at all?
  - It is equivalent to an AC short
- Todd: We want to reuse data the vendors have
  - They have s4p data
- Walter: Kumar used infinite impedances to ground with s2ps
  - This is what it looks like to the outside world
  - Arpad: An infinite impedance can be implemented as a current source

- Arpad: Will Walter continue working on this?
  - Walter: No plans for now
  - Arpad: Hopefully Synopsys can join us next week

Next meeting: 17 March 2009 12:00pm PT

-----------

IBIS Macromodel Task Group

Meeting date: 03 March 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
* David Banas, Xilinx
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
  Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
* Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Terry Jernberg, Cadence Design Systems
  Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

Arpad: There was a conversation about s-params on the si-list recently
- Scott McMorrow asked why we would want to restrict s-params
  - Michael M: We must decide how much to say about quality, above and beyond 
format
  - Bob: Tools try to take care of these problems

Michael M: 2 years ago at DesignCon scope makers were interested in an AMI-like 
approach
- Walter: We did not ask scope makers to join us this time
  - They do a channel TDR to get equivalent impulse response
  - They have internal RX models
- Michael M: We should invite them to join a meeting

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Todd:   Start a BIRD for IBIS s-params
  - TBD

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Continued discussion of IBIS Interconnect SPICE:
- Walter showed his IBIS Interconnect SPICE document
- Page 12:
  - This call has N nodes plus a reference node
  - Assuming the reference node is DC
  - Params: MNAME (model name), TYPE=s or y
  - Only FBASE and FMAX are commonly used
    - This seems to be required to make HSPICE work
  - Arpad: What is the order of precedence for instance vs. model params?
  - Radek: Do FBASE and FMAX truncate the file data?
    - We have to look into this
    - Randy: They are frequency points used for transient analysis
  - Arpad: Use of a single reference node makes all other ports single ended
    - Does this limit us?
    - Walter: One should be fine for what we are doing
    - Bob: Any port can be used as a reference node
      - Radek: That does not sound right
      - Michael M: Are we sure each port is a node?
      - Bob: The manual says this
    - Michael M: There are at least 3 terminal arrangements
      - HSPICE seems to use 2:
        - One reference for all nodes
        - One reference for each node
  - Bob: It may be best to copy the HSPICE description verbatim
    - Walter: We may want to limit how we use it
    - Michael M: We can invite Synopsys to join us to explain it
  - Mike L: Can TSTONFILE be used on the S call to bypass .MODEL?
    - Walter: Don't think so
    - Arpad: It would be a nice feature, maybe we should do it
      - Walter: Maybe as a next step
- Page 13:
  - The W element N= param is redundant
    - It can be determined from the number of terminals
  - HSPICE recommends not using RLCGFILE (deprecated)
  - NODEMAP is used when W elem calls an s-param
  - We have to know what the units of the model are to call it correctly
    - It could be inches, meters, whatever
  - TABLE model syntax is more complicated
    - It is similar to W model in ICM
  - Michael M: Suggest:
    - RLCG and TABLE .MODEL allow you to change order of matrices
    - The RLGC file has a more rigid format, easy to get wrong
    - How do we handle interpolation?
    - We should exclude geometric models
    - Randy: Would like to support RLGCFILE because models exist
  - Mike L: Are Rs and Gd still used?
    - Walter: Yes, quite accurate for stripline
    - Radek: Agree
  - Arpad: Does W have to support S format?
    - Radek: It is OK if only the S element has this
  - Radek: SP model format used by tabular format is very flexible
    - This is LMODEL, CMODEL, RMODEL, GMODEL
    - This may be difficult to use, goes far beyond W element
- Page 6:
  - We have to verify the list of functions
  - Arpad: ** can be used for ^
  - Walter: In HSPICE .PARAM can contain a node, but not here
    - Arpad: Not so sure, params are supposed to be static
      - Maybe it would use the DC operating point
    - This needs to be verified
- Page 9:
  - Not all EFGH elements support all options shown
- Page 10:
  - Bob: We should drop Foster Pole-Residue form
    - Radek: This is useful
    - We will keep it

AR: Todd invite Synopsys to join us for a syntax review

Arpad: We should add the details to make this a complete manual
- Walter that is the next step, but it is not trivial
  - Would be better to have a better source than PDF
- Arpad: Do we want to use the HSPICE format?
  - Walter: We should use HSPICE format
  - Bob: We should show that we are not hiding the origin of the document
    - We will need the source documents
  - Walter: Would prefer to just highlight the sections we are using
  - Mike L: There are PDF converters to other formats
    - Walter: It's easier to have it already in coherent document format

AR: Walter send updated IBIS Interconnect SPICE proposal to Mike L for posting
AR: Mike L post updated IBIS Interconnect SPICE proposal 

Next meeting: 10 March 2009 12:00pm PT

-----------

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