[ibis-macro] Minutes for the 12 May 2009 ibis-atm meeting
- From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
- To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
- Date: Fri, 15 May 2009 11:14:51 -0400
Minutes for the 12 May 2009 ibis-atm meeting are attached.
Mike
IBIS Macromodel Task Group
Meeting date: 12 May 2009
Members (asterisk for those attending):
Adge Hawes, IBM
Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
Brad Brim, Sigrity
Brad Griffin, Cadence Design Systems
Chris McGrath, Synopsys
David Banas, Xilinx
Deepak Ramaswany, Ansoft
Donald Telian, consultant
Doug White, Cisco Systems
Eckhard Lenski, Nokia-Siemens Networks
Essaid Bensoudane, ST Microelectronics
Fangyi Rao, Agilent
Ganesh Narayanaswamy, ST Micro
Gang Kang, Sigrity
Hemant Shah, Cadence Design Systems
Ian Dodd, Agilent
Jerry Chuang, Xilinx
Joe Abler, IBM
* John Angulo, Mentor Graphics
John Shields, Mentor Graphics
Ken Willis, Cadence Design Systems
Kumar Keshavan, Sigrity
Lance Wang, Cadence Design Systems
Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
Mike Steinberger, SiSoft
Mustansir Fanaswalla, Xilinx
Patrick O'Halloran, Tiburon Design Automation
Paul Fernando, NCSU
Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
Ray Comeau, Cadence Design Systems
Richard Mellitz, Intel
Richard Ward, Texas Instruments
Samuel Mertens, Ansoft
Sam Chitwood, Sigrity
Sanjeev Gupta, Agilent
Shangli Wu, Cadence Design Systems
Sid Singh, Extreme Networks
Stephen Scearce, Cisco Systems
Steve Pytel, Ansoft
Syed Huq, Cisco Systems
Syed Sadeghi, ST Micro
Ted Mido, Synopsys
Terry Jernberg, Cadence Design Systems
Todd Westerhoff, SiSoft
Vladimir Dmitriev-Zdorov
Vikas Gupta, Xilinx
Vuk Borich, Agilent
* Walter Katz, SiSoft
Zhen Mu, Cadence Design Systems
------------------------------------------------------------------------
Opens:
Arpad: Do we have a list of all elements?
- Walter: Forgot to do that, will get to it
--------------------------
Call for patent disclosure:
- No one declared a patent.
-------------
Review of ARs:
- Mike L add wishlist to minutes
- Done, but there is only one item
- Todd: Write IBIS s-param BIRD
- Still working on it
- Arpad: Write parameter passing syntax proposal (BIRD draft)
for *-AMS models in IBIS that is consistent with the
parameter passing syntax of the AMI models
- TBD
- TBD: Propose a parameter passing syntax for the SPICE
- [External ...] also?
- TBD
- Arpad: Review the documentation (annotation) in the macro libraries.
- Deferred until a demand arises or we have nothing else to do
-------------
New Discussion:
Continued review of IBIS-IS documents:
Walter: We are still missing documents for the V and T elements
E element:
- Walter: We could remove MAX, MIN, SCALE, TC1, TC2, ABS, IC
- Mike L: Should there be a GAIN= param as with R=, C= ?
- Walter: HSPICE doesn't have it
- Arpad: We could retain TC1 and TC2 because they are linear
- Maybe TC2 is not linear
- Radek: These are based on a TEMP parameter, which we don't have
- Walter: A post-processor could calculate these into the gain
- Mike L: Why does LAPLACE have no [] if [VCVS] does?
- Walter: VCVS is optional, LAPLACE is required
- Walter: Examples for POLE were left in, not deleted
- Mike L: It says "You can use parameters to specify a, b, alpha, and f"
- It is not clear what named parameters these are
- Walter: May have deleted too much documentation
- Radek: az1 is the positional parameter "alpha z1"
- Arpad: The command syntax has to be ASCII, so it doesn't have "alpha"
- Walter deleted LEVEL from the parameter table
F element:
- Walter: This is like the E element, but with no LAPLACE or POLE
G element:
- Mike L: We can drop SCALE=
- Walter deleted SCALE from the parameter table
H element:
- Walter: Only the simple linear form is supported
Mike L: Will we re-insert all the examples and such that were deleted?
- Walter: This is good enough for EDA tools to know what to support
Arpad: We had talked about hiring an editor, how do we proceed?
- Mike L: Where would the funding come from?
- Arpad: We can ask the IBIS Open Forum
- Walter: We should show the integrated document to the Open Forum
- Arpad: An integrated document would give a better idea of what it looks like
- Maybe we would not need an editor if it looks good enough
- Bob: We could add "Refer to the HSPICE documentation for complete
descriptions"
- We may have to describe TEMP if needed, for example
- Bob: The language syntax document could become large
- Mike L: Do we know when we will receive that from Synopsys?
- Walter: We have seen those pages, so we are not stuck
- Bob: We might get away with describing only the elements
- Arpad: The spec should stand alone, without external references
Walter showed a T element document that he created from PDF
- Walter: We could use this, but would prefer a document from Synopsys
- Arpad: It would be better to proofread when it is put together
- Bob: The document should be organized like HSPICE chapters
Mike L: Since IBIS-IS is for interconnect modules we do not need .END
- Walter: Agree
- Mike L: We had discussed .INCLUDE but did we decide to have it?
- Walter: That would be useful
- Bob: There should be no elements in the main circuit
- .SUBCKT is required
- Arpad: This would have to be in the rules section
- Arpad: .INCLUDE would be handy for inserting vias, etc.
- Mike L: Is .INCLUDE in HSPICE an "include once"?
- Walter: No, it always includes
- Mike L: Multiple .INCLUDEs could create duplicate element problems
- Walter: There is no conflict when called from different SUBCKTs
- Walter: We should not have .LIB because it is somewhat simulator-specific
T element:
- Walter: Do we want to assume L=1 or support L= ?
- The TD parameter is in units of L, but people assume TD is time
- Bob: We should do whatever HSPICE supports
- Walter: HSPICE does support this
- Radek: It doesn't make sense to support 2 different methods
- We will keep the L= parameter
Walter: For those who will be in the Interconnect meeting tomorrow:
- Port information is not in the TOUCHSTONE2 file format
- We are delivering S param models for packages and such
- Wrappers are needed for these
- This may come up in the Interconnect meeting
There are 4 or 5 pages left to review next week
Next meeting: 17 May 2009 12:00pm PT
--------
IBIS Interconnect SPICE Wish List:
1) Simulator directives
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