It was a minor bug after all. On Wed, February 8, 2006 7:56 pm, Muranyi, Arpad wrote: > One more thing, it seems that the Verilog and VHDL > sides do the same thing as far as the ordering > problem goes, I may have gotten confused about that > when I was rushing to my meeting... > > Arpad > ==================================================== > > -----Original Message----- > From: Muranyi, Arpad > Sent: Wednesday, February 08, 2006 4:55 PM > To: 'prfernan@xxxxxxxx' > Subject: RE: [ibis-macro] Re: IBIS-to-AMS script update > > Paul, > > Forgot to mention that in this version I started to see > messages in the DOS window about "Swapped ... " which > you should turn off. I am not interested in seeing this > (seems to be a debug feature you put in there) and it > sounds a little scary for the novice... > > Arpad > ======================================================== > > -----Original Message----- > From: Muranyi, Arpad > Sent: Wednesday, February 08, 2006 4:53 PM > To: 'prfernan@xxxxxxxx' > Subject: RE: [ibis-macro] Re: IBIS-to-AMS script update > > Paul, > > Please try the attached file. Just to reiterate, > r1 should have the table that has a LOWER Vfixture > value than the table that goes into r2, and f1 > should have the table that has a HIGHER Vfixture > than the table that goes into f2. > > Interestingly, when I used the buffers in the lab_1.ibs > file, the order was correct. From this I suspect that > your compare does something differently depending on > whether Vfixture is equal to the supply voltages compared > when it is something else (which is what this test file > does). > > Thanks, > > Arpad > ====================================================-----Original Message----- > From: ibis-macro-bounce@xxxxxxxxxxxxx > [mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf > Of Paul Fernando > Sent: Wednesday, February 08, 2006 3:57 PM > To: ibis-macro@xxxxxxxxxxxxx > Subject: [ibis-macro] Re: IBIS-to-AMS script update > > I fixed #2. > I can't recreate #1. And like you said, its odd that this is happening. Could > you give > me a sequence to re-create the condition? >