[ibis-macro] FW: [IBIS-Users] Verilog A templates for SSO enhancement of IBIS model
- From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
- To: <ibis-macro@xxxxxxxxxxxxx>
- Date: Mon, 6 Mar 2006 08:28:11 -0800
This sounds like a good discussion topic
for our group.
Arpad
========================================
________________________________
From: owner-ibis-users@xxxxxxx [mailto:owner-ibis-users@xxxxxxx] On Behalf Of
Ummalaneni, Venu Babu (Venu)
Sent: Monday, March 06, 2006 5:25 AM
To: ibis-users@xxxxxxx
Subject: [IBIS-Users] Verilog A templates for SSO enhancement of IBIS model
Hi All,
Does anyone is working on development of verilog-A templates for SSO
enhancement of IBIS model?
I hope these verilog-A templates will be useful as BIRD's 95.6 (Power Integrity
Analysis using IBIS) and 97.2 (Gate Modulation Effect).
Thanks for your inputs.
Regards,
Venu
Other related posts:
- » [ibis-macro] FW: [IBIS-Users] Verilog A templates for SSO enhancement of IBIS model
