Mike, If you need examples for the VHDL-AMS calls, look at any of the "NSX" files in the VHDL-AMS distribution. In order to simplify the bookkeeping, I would add both syntaxes in the examples, and have them present in both flavors of the library. This way you won't have to keep track of the two documentations separately. I would do the same in those other cases too where there are some differences between the VHDL-AMS and Verilog-A versions, such as in the PWL and buffer models where there is a file name parameter in the VHDL-AMS version but not in the Verilog-AMS version... Arpad ================================================================== -----Original Message----- From: ibis-macro-bounce@xxxxxxxxxxxxx [mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Muranyi, Arpad Sent: Friday, July 07, 2006 9:39 AM To: ibis-macro Subject: [ibis-macro] Comments on the macro library documentation Mike, ... ... ... 4) Instance call examples in VHDL-AMS library should not show Verilog-AMS syntax! ... ... ... --------------------------------------------------------------------- IBIS Macro website : http://www.eda.org/pub/ibis/macromodel_wip/ IBIS Macro reflector: //www.freelists.org/list/ibis-macro To unsubscribe send an email: To: ibis-macro-request@xxxxxxxxxxxxx Subject: unsubscribe