[ibis-macro] Re: Charge conserving capacitor model

  • From: "Todd Westerhoff (twesterh)" <twesterh@xxxxxxxxx>
  • To: <ibis-macro@xxxxxxxxxxxxx>
  • Date: Wed, 17 Aug 2005 16:18:16 -0400

My vote:

Keep it simple for now, and come up with a solution for a charge
conserving model when we're developing a model template that needs one.

Todd.


Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave - Boxboro, MA - 01719 email:twesterh@xxxxxxxxx
ph: 978-936-2149
============================================
 
"Always do right.
 This will gratify some people and astonish the rest."
 
- Mark Twain


-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Muranyi, Arpad
Sent: Tuesday, August 16, 2005 7:49 PM
To: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Charge conserving capacitor model

I checked in the Verilog-AMS LRM, and found the following:

"Parameters represent constants, hence it is illegal to modify their
value at runtime.
However, parameters can be modified at compilation time to have values
which are different from those specified in the declaration assignment.
This allows customization of module instances."

This means that there is no way to make the value of C change during
simulations if it is passed as a parameter to the module.  Based on this
observation, I can't think of a need to write the charge conserving
equations.  A simple I = C*dV/dt should be sufficient.  (Correct me if I
am wrong).

However, the next question is, do we need to find a way to make a
capacitor model which can vary its value during simulations?  And if so,
should it be charge conserving?
Or, perhaps should we have two versions of such a model, one that is
charge conserving, and another that is not?

I don't think it would be too hard to do this, but it would need a 3rd
terminal which would bring the dynamic C value into the module as a
signal.  This is not too difficult, but I am trying to think about
compatibility with other
(SPICE) tools.  I haven't seen a 3-terminal capacitor, so I wonder.  On
the other hand, HSPICE can do C='expression'
where the expression can include any node voltages or branch currents.
We may want to provide a similar capability.

Please comment.  Thanks,

Arpad
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