Walter,
Thanks for your effort of "stabbing"... :)
This is a good start, but has numerous problems, ranging from small grammatical
ones to
large theoretical (philosophical) ones. I feel it will take quite a bit of
effort to clean it up
and get all of us in an agreement...
My general comments are that talking about IBIS history and how it evolved is
not very
spec-like material. Similarly, making promises about what will be done in
future versions
is quite dangerous. Case in point is the forward looking, unsupported
package/interconnect
model examples associated with Figure 29.
On a more technical side, we all know that a voltage is something that can only
exist between
two locations. Your wording: "pins with a zero voltage" and "buffer rail
voltage" are highly
questionable because in my mind they seem to refer to a single point or
location. How can
we say than that a pin or a buffer rail (by itself) has ***a*** voltage?
Voltage can only exist
between "it" and "something else".
A somewhat more general, but still technical issue I have (especially in the
context of SPICE
elements) is that you talk about ***reference*** too much. Take, for example,
a resistor.
It has two terminals. Why do we need to call its "other terminal" ***the***
reference?
Yes, if we think of the resistor as a one-port, we could consider one of its
terminals the
reference terminal. But how many people think of a resistor as a one-port in a
SPICE
netlist context? How is this different from the W-element or S-element, in
which case
we start talking about ports much more readily? I think this difference comes
from how
these circuit elements are used in the netlist. In the case of W and
S-elements, we are
usually interested in their port voltages, and not the voltage differences
between the
various ports (unless differential signaling comes into the picture). On the
other hand,
in the case of a resistor, what we are interested in depends greatly on how it
is placed
into the circuit. It might be the voltage across it, but it could also be the
voltage between
one or the other of its terminals and something else. I feel that we need a
better definition
for what a reference really is, and when and why we might call a terminal a
reference.
I will stop with this, the rest of the text may depend on how we answer these
questions.
Thanks,
Arpad
=====================================================================
From: ibis-interconn-bounce@xxxxxxxxxxxxx
[mailto:ibis-interconn-bounce@xxxxxxxxxxxxx] On Behalf Of Walter Katz
Sent: Tuesday, March 13, 2018 9:18 PM
To: 'IBIS-Interconnect' <ibis-interconn@xxxxxxxxxxxxx>; IBIS-ATM
<ibis-macro@xxxxxxxxxxxxx>
Subject: [ibis-interconn] Another stab at defining A_gnd
All,
Here is a discussion and definition of A_gnd based on the presentation and
discussion we had today. I think this could go somewhere in the beginning of
IBIS.
All voltages in IV curve, VT, curves, Measurement Thresholds, Model Spec
voltages in this document are voltage that are either measured in hardware or
simulations reference to an appropriate location in the hardware or node in a
simulation. IBIS originally defined voltage measurements at pins are measured
relative to a reference pin. Data Books usually refer to these reference pins
as "Ground" or supply pins with a zero voltage. As IBIS has evolved to define
rules at the die pad, and with BIRD 189 at the buffer itself it is necessary to
move reference point to the die pad or to the buffer rail voltage. IBIS defines
the reserved name A_gnd to refer to this location.
Note that "measurement" in this document shall either refer to
1. A physical measurement of a voltage between a probe point and a reference
point
2. A simulation "probe" of a voltage between a probed node and a reference
node.
A connection between two or more I/O buffer models can be defined as an
IBIS-ISS netlist which is essentially a list of IBIS-ISS element instances. The
terminals of these elements can reference nodes for the other terminals of
these elements. There is no requirement that the reference A_gnd for one
measurement on a buffer be the same SPICE node as the reference A_gnd for a
measurement at a buffer either in the same component or a buffer in a different
component.
All data in the specification is based on the assumption that rail voltages are
static. [Pin Mapping] allows the EDA tool to determine which pin(s) supply the
voltages to all of the rail terminals of a [Model], and therefore all of the
references for all of the interconnect between [Model]s and pins.
Note that in the case of some ECL, MECL, PECL and RS232, IBIS models may have
voltages that are referenced to some point outside of the component. In this
case the reference location (A_gnd) is external to the component, and the EDA
tool must choose a reference node for rail voltages supplied to the component
and for measurements made at the I/O pin, pad or buffer. This reference "Node
0" is commonly used in this case.
One must take great care in defining reference node connections when doing
Power Aware Simulations. A simulation is a Power Aware Simulation when the rail
voltages referenced to their local reference node or referenced to a simulator
reference node (e.g. Node 0 ) change in time.
Almost every use of the word "ground" in this document refers to a point in the
hardware or a node in a simulation that is the reference for signal and supply
voltage measurements for a Device Under Test. In IBIS 7.0 or 7.1, all of these
reference to "ground" will be clarified to mean the reference point for
measurement (A_gnd).
Walter
Walter Katz
wkatz@xxxxxxxxxx<mailto:wkatz@xxxxxxxxxx>
978.461-0449 x 133
Mobile 303.335-6156
