[ibis-macro] Re: Analog Model Isolation Definition
- From: "Walter Katz" <wkatz@xxxxxxxxxx>
- To: <james.zhou@xxxxxxxxxx>, <bob@xxxxxxxxxxxxx>, "'IBIS-ATM'" <ibis-macro@xxxxxxxxxxxxx>
- Date: Wed, 21 Mar 2012 14:00:53 -0400 (EDT)
All,
I agree with James assessment. I do believe it would be extremely useful
to have a cookbook document on how to generate these on-die s-parameters.
A simple example would be to generate on-die s-parameters for the Thevenin
(RC) Tx and Rx models that were described in BIRD 122. The Tx could just
have an Rs and Cc (e.g. a single ended impedance of 50 Ohms, and C_comp of
.2pf). The Rx could just have an Rd and Cc (e.g. a differential impedance
of 100 Ohms, and C_comp of .2pf).
Walter
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of James Zhou
Sent: Wednesday, March 21, 2012 1:53 PM
To: bob@xxxxxxxxxxxxx; 'IBIS-ATM'
Subject: [ibis-macro] Re: Analog Model Isolation Definition
Hi Bob,
Thanks for providing the link of past references. It is helpful for those
of us who were not on the list a couple of years ago.
With reference to: "the complete interface needs to be known and defined
... to get the proper gain (S21 term).", this is a proven and well-known
principle in circuit and LTI network analysis. The conclusion at
yesterday's meeting sufficiently satisfies this requirement. The
conclusion as I interpreted was that, IBIS Specification only need to say
that the Tx analog circuit input must be driven by ideal voltage sources
(i.e. zero source impedance), and Rx analog circuit output must drive a
load with infinite impedance. Once this is established, the Specification
does not need to say anything about what goes into, or how to model, the
"bigger blockbox" in the diagram (provided it satisfies other IBIS
requirements such as LTI and IBIS-ISS compliant, etc.).
With reference to: "In both cases, the transfer function S21 term is
changed by a factor of 2...", these two cases represent total reflection
by open or short circuits (S11=1 or -1). In both cases, S21 must be 0.
This result is consistent with the general formula of S-parameter modeling
when S11 can have arbitrary values (including the cases of S11=1 or -1).
The treatment for these specific cases of open and short circuits can be
provided in the Specification as examples instead of requirements of the
Specification.
On the issue of setting S12=0, there have been IBIS discussions or
presentations recommending this. However, it is not necessary to impose
this condition on the analog circuits and it should not be treated as a
requirement of the BIS Specification.
Regards,
James Zhou
QLogic Corp.
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Bob Ross
Sent: Tuesday, March 20, 2012 2:57 PM
To: 'IBIS-ATM'
Subject: [ibis-macro] Analog Model Isolation Definition
All:
Per the discussion today on the block interface definition, here is a
derivation based on BIRD122 for just s2p 2-ports (but should apply to s4p
files with more math). It shows the gain sensitivity to the explicit S11
term for TX and S22 term for RX from a reference impedance definition
(e.g., TX: S11=0 or 50 ohm to infinite impedance S11 = 1 and RX: S22=0 to
zero impedance S11=-1).
In both cases, the transfer function S21 term is changed by a factor of 2
(assuming no S12 term). This is equivalent to specifying the isolation
interfaces with a unity gain ideal voltage amplifier.
//www.freelists.org/post/ibis-macro/Eelement-in-analog-model-BIRD,1
Sorry, but some of the prior material may have involved some lost or
private e-mails and also a presentation or e-mail shown to the ATM
committee according to questions and exchanges in the Dec. 14, 2010
minutes including:
Walter showed an email from Fangyi:
- Fangyi: The equation is at the bottom
- Bob: We have defined S12 as zero
- The real voltage gain is a function of S11
- Todd: Is this because S11 can affect V1 and therefore V2?
- Fangyi: No
- If V1 was fixed V2 would still be affected by S11
- Bob: The defaults should be zero for series impedances and
infinity for impedances to ground.
http://www.vhdl.org/ibis/macromodel_wip/minutes/20101214/mikelabontecisco/
Mi
nutes%20for%20the%2012-14-2010%20ibis-atm%20meeting/20101214.txt
The main point is that the complete interface needs to be known and
defined in the Specification (for S-parameters and perhaps different for a
SPICE model) to get the proper gain (S21 term).
Bob
--
Bob Ross
Teraspeed Consulting Group, LCC
http://www.teraspeed.com
bob@xxxxxxxxxxxxxx
Direct : 503-246-8048
Teraspeed Labs: 503-430-1065
Headquarters: 401-284-1827
Teraspeed is a registered service mark of Teraspeed Consulting Group LLC
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