[hsdd] High-Speed Digital Design Newsletter - - Jitter Creation

  • From: "Howard Johnson" <howie03@xxxxxxxxxx>
  • To: <hsdd@xxxxxxxxxxxxx>
  • Date: Fri, 9 Oct 2009 12:51:12 -0700

  

          <http://www.sigcon.com/index.htm> Home
<http://www.sigcon.com/contact.htm> Contact             
        
 <http://www.sigcon.com/seminars.htm> Seminars
<http://www.sigcon.com/publications.htm> Publications
<http://www.sigcon.com/films.htm> SiLab Films
<http://www.sigcon.com/consulting.htm> Consulting       




 

 

 

2009 Signal Integrity Seminars

taught by Dr. Howard Johnson 

  

 

 <http://www.regonline.com/PhoenixAZ2009> Register NOW!
Phoenix, AZ      U. Oxford, U.K.        
 <http://www.sigcon.com/seminars/seminarHSDD.htm> High- Speed Digital
Design:    <http://www.sigcon.com/seminars/RochesterAHSSP.htm> November 2-3
<http://www.sigcon.com/seminars/RochesterAHSSP.htm> , 2009
<http://www.sigcon.com/seminars/Oxford.htm> June 22-23, 2010    
 <http://www.sigcon.com/seminars/seminarAHSSP.htm> Advanced High-Speed
Signal Propagation:                     
 <http://www.sigcon.com/seminars/seminarHSNG.htm> High-Speed Noise and
Grounding:        <http://www.sigcon.com/seminars/RochesterHSNG.htm>
November 4-5 <http://www.sigcon.com/seminars/RochesterHSNG.htm> , 2009
<http://www.sigcon.com/seminars/oxford.htm> June 24-25, 2010    
         
Jitter Creation 


HIGH-SPEED DIGITAL DESIGN - online newsletter - 
Vol. 12 Issue 06
  


I'll be in Phoenix, AZ, the first week of November teaching two courses:
High-Speed Digital Design and High-Speed Noise and Grounding.  This is my
first time teaching public classes in Phoenix, and I look forward to seeing
many of my former students at the Noise and Grounding class.  I hear Phoenix
is terrific in November.

Attention General Dynamics, Intel and Raytheon employees:  Special employee
discounts are available for these courses.  For more information, write to
us at  <mailto:info03@xxxxxxxxxx> info03@xxxxxxxxxxx

  _____  


Good measurement technique requires practice. The need for practice
increases with the difficulty of measurement. 

For example, if I want to measure the size of a sheet of paper with
sufficient accuracy to determine whether it is a standard U.S. 8-1/2 x 11
in. size, or the slightly longer European A4 format, all I need is a flat
ruler and a few moments. Most grade-school children could do that job. 

On the other hand, if I want to determine whether my new 2.5 Gb/s serial
link performs within its jitter specification, the measurement process
becomes substantially more complex. People who make jitter measurements on a
regular basis know that the required skill does not develop overnight. 

The best way to develop your jitter-measurement prowess is to begin looking
at known, calibrated sources of jitter. As you develop your measurement
technique, a calibrated source makes it easy to see, and easy to understand,
what the many adjustments on your jitter-measuring equipment actually do. 

Here is a simple and effective jitter-creation technique you can use in your
own laboratory to create calibrated amounts of jitter. 

The following article continues a series of articles about jitter. The first
article in the series is: "Jitter Characterization",
www.sigcon.com/Pubs/news/11_06.htm    

 

  _____  


Jitter Creation


By Dr. Howard Johnson,

The heart of the jitter-creation circuit I am going to describe involves a
three-port splitter (Figure 1). Sometimes, to emphasize the electrically
symmetric function of a splitter device, the package is made round with the
three ports mounted 120 degrees apart. My splitter came in a square package.




Figure 1-This three-port splitter comes equipped with SMA connectors. The
port on the left has an SMA-BNC adapter added to it. 

In ordinary use, if you apply an input signal to any one of the three ports,
the splitter passes the signal through to both the other ports at half
amplitude. For proper operation you must terminate each port (including the
input) with a 50-ohm load. 

The splitter is a passive device. It is made from three 17-ohm resistors
internally connected in a "Y" configuration (Figure 2). From the input on
the left, the signal passes through the first 17-ohm resistor to the
mid-point junction of the three resistors. From there the signal sees a load
comprised of two symmetric paths in parallel. The top of the figure lists
the consolidated impedances of the loads taken in parallel. The impedance of
two 17-ohm resistors taken in parallel makes 8.5 ohms.  The impedance of two
50-ohm loads taken in parallel makes 25 ohms. The overall impedance seen at
the input therefore equals 17 plus 8.5 plus 25, for a total of approximately
50 ohms-a perfect match. (Using actual resistor values of 16-2/3 ohms the
math adds perfectly).  

The consolidated series resistance of the splitter is 17 + 8.5 = 25 ohms.
That resistance feeds a consolidated load of 25 ohms, giving an attenuation
factor of 1/2 from the input to each of the two outputs. In common usage
such a splitter is called a "6-dB splitter". 

Note that the power output at each port amounts to only 1/4 of the input
power. The total output power therefore equals only half the input power.
The other half of the input signal power is lost passing through the
resistors internal to the splitter. Caution: in high-powered systems
splitters can get HOT! 



Figure 2-A three-port splitter loses 6 dB between the input to each of the
outputs. 

The splitter concept is simple, but the trick is getting the device to work
smoothly from DC all the way up through the GHz range.  That's a matter of
appropriate component selection and good internal layout. A well-designed
splitter can, in theory, have any number of ports greater than 2. 

It turns out that any passive device that splits one input into two outputs
can also be used backwards to combine two inputs into a single output. In my
jitter-generation application I use the splitter in that mode to combine two
signals. Provided that all three ports of the splitter lead to 50-ohm
devices, the output of my splitter equals the sum its two inputs, divided by
two. In effect, the splitter averages the two inputs. For this to work, the
impedance driving each port of the splitter must be 50 ohms. 

Figure 3 shows the whole jitter-creation circuit. At the bottom left of the
diagram, the master clock source for this circuit is an HP 8640B low-noise
RF oscillator. The RF oscillator pumps out a 10-MHz sine wave at +12 dBm. On
top of that sine wave I superimpose a phase-modulating signal. The splitter,
used backwards, accomplishes the superposition. 



Figure 3-Square wave modulation creates sudden shifts in the clock phase. 

The phase-modulating signal comes from an HP8012B waveform generator. It
produces a 1-MHz square wave. The square wave amplitude is set to a small
fraction of the amplitude of the HP 8640B sine-wave. As the square wave goes
up and down it changes the DC bias level of the sine wave carrier passing
through the splitter. Changing the DC bias level affects the precise
position of the sine wave zero crossings. Specifically, a positive bias
equal to 30% of the sine wave amplitude advances all the rising edges by 5%
of the cycle time and retards the falling edges by the same 5%. In that way
the phase modulation changes the duty cycle of the clock output. The pulse
generator that follows is used in GATE mode. It simply squares up the clock
signal, producing a digital-looking waveform with edges located at the
prescribed zero-crossings of the input signal. 

I like the simplicity of this circuit. By calibrating the amplitude of the
phase-modulation signal compared to the RF carrier (both as measured at the
output of the splitter), you can create precise amounts of phase modulation.
When you choose your test equipment for this circuit, remember that the
quality of the RF signal source directly affects the result. Any jitter
present in the source translates directly to the output, plus any phase
modulation you have added. Therefore, if you want accurate results, use a
high-quality, low-noise RF source. The HP8640B I used is a rather old
20th-centruy device based on a very high-Q mechanically tuned resonator. The
phase noise is extraordinarily low. Although you can get a digitally
synthesized source today with slightly better performance, I don't think you
can beat the price of an old used HP8640B. 

Once your jitter-creation circuit works, start flipping switches on your
jitter-measurement equipment to see what they all do. In my case, I gained
access to a LeCroy SDA 6020 scope to make some measurements. Here is what I
found. 

Figure 4 shows the jittery CLK OUT signal produced with the following
settings: Clock frequency=10 MHz, modulating frequency=1 MHz. The square
wave amplitude equals 30% of the sine wave carrier amplitude. I've
intentionally chosen a rather low clock frequency in this picture so you can
see the individual clock transitions. At 100 MHz or higher the signal at
this scale of time would just look like a blur. 

In this circuit positive phase modulation enlarges the duty cycle of
CLK_OUT, creating fat-topped cycles. Compared to an ideal clock at the same
frequency, the rising edges in the fat-topped portion of the signal appear
earlier than expected. Negative phase modulation reduces the duty cycle,
creating a fat-bottomed signal with late rising edges. 



Figure 4-The TIE@LEVEL measurement function acts as a phase detector.

The top waveform in the graph (pink) represents the modulating signal on a
vertical scale of 100 mUI per division. The abbreviation "UI" means "unit
interval". In this case one unit interval equals the clock period of 100 ns.


CLK_OUT is the fast-moving green signal in the middle on a vertical scale of
2 V per division. 

The blue trace in the center of Figure 3 represents the phase of CLK_OUT, as
detected by my LeCroy SDA6020 scope. The blue trace was computed using the
scope's internal Time-Interval-Error (TIE) measurement function called
TIE@LEVEL. 



The TIE function displays jitter


The LeCroy SDA6020 scope provides a Time-Interval-Error (TIE) measurement
function called TIE@level. I just call it the "TIE function".  Other brands
of scopes have similar features, but they go by different names. I shall use
LeCroy terminology to describe the settings used in this article. 

You may think of the TIE function as a kind of "phase detector". It detects
the incoming signal phase relative to an internally synthesized, ideal
reference clock at the same frequency. 

The TIE function is one of many built-in functions provided for the purpose
of characterizing jitter. 

The TIE function is a measurement function in the LeCroy SDA6020 (as opposed
to a math function).  The TIE function maps a vector of data samples to a
vector of output points. The data samples must be captured together in one
continuous real-time burst. Such a collection of data samples in called, in
LeCroy terminology, a "trace". A trace may contain a large number of sampled
data points. 

The TIE function produces a vector of output points, each point
corresponding to one edge in the input trace. There are usually far fewer
points in the TIE output than in the TIE input trace, according to how
aggressively you have over-sampled the input signal. 

I have configured the TIE function to measure jitter in a clock signal by
choosing "Input is: Clock" (Figure 5). This setting restricts the scope to
looking at only one type of signal edge (either positive or negative). In
this case I chose positive edges. If you choose, "Input is: Data", the same
function works on both positive and negative edges. 



Figure 5-The TIE function provides a multitude of options. 

 

The setting: "Interval is: Edge-Ref" make the TIE measure, at each signal
edge, the degree to which that edge appears early or late compared to an
internally synthesized, ideal reference clock at the same frequency. If you
choose "Interval is: Edge-Edge" it just compares each signal edge against
the next. That's not what I want. Edge-to-edge measurements show variations
in the clock cycle length, but not the absolute placement of clock edges
relative to an ideal reference. 

The TIE function lets you measure rising edges, falling edges, or both. If
you select "Level is: Percent" it lets you choose the level (percentile of
signal swing) at which the edge timing is measured, which explains the
"@level" notation in the TIE@level measurement function name. 

The adjustable threshold crossing level is provided so you can assess the
degree of increase in jitter expected with variation in the input threshold
of your receiver. 

For clock analysis I choose rising edges only at the 50% level, with no
hysteresis. For data analysis I choose both edges at the 50% level. 


Displaying the result

Either the TREND function or the TRACK function can convert the TIE output
into a data trace suitable for viewing or further processing. Both TREND and
TRACK are math functions. 

The difference between the two functions involves the number of output
points they create. 

The TREND function outputs a sub-sampled vector of reported results from
TIE, leaving it up to you to figure out the horizontal scale. For clock
analysis the TREND function produces one reported result per clock cycle.
That makes a horizontal scale of one unit interval (one UI) per output
point. The TREND function is useful when working with highly over-sampled
data waveforms, because it reduces the number of data points to a manageable
amount. Working with a 200MHz clock, for example, you might capture 10
million data samples representing only 100,000 rising edges. The TREND
function produces a vector of exactly 100,000 points. The TRACK function
would output all 10 million points. 

The TREND function must be configured according to the number of points you
wish to keep. In the context of jitter analysis, ensure that the number of
points you ask for is LESS than the number of edges you are guaranteed to
receive during one coherent blast of data sampling. Otherwise, the TREND
function will attempt to collect the required number of data points from two
or more successive data captures, thus intermixing data from non-coherently
sampled sequences. 

The TRACK function interpolates between the sub-sampled input points,
producing a full-resolution trace with the same number of points as the
original source waveform so there is no doubt about the horizontal scale.
There is no more information contained in a TRACK display than a TREND
display, it's just a choice of whether to interpolate the output, and how to
interpret the horizontal scale. The disadvantage to TRACK is that, for my
example with 10 million data samples, you get 10 million output points. If
you are planning some FFT processing of the TIE track 10 million points is
way too many.

Figure 4 displays TIE information using the TRACK function (interpolated
output). The vertical scale of the TIE trace is 100 mUI/div. The horizontal
scale equals 200 ns/div. The CLK_OUT and TIE traces were generated together
from one continuous sweep of 5000 points taken at 1 GS/s. That makes 5
microseconds worth of data, of which Figure 3 shows 2 microseconds. I did
not use the modulation sync signal shown in Figure 3 for this measurement. 

Because the TIE@LEVEL function reports new phase information only once after
each signal edge, the TIE output appears highly quantized in time. Between
reported values the scope display linearly interpolates. That accounts for
the "linear ramp" appearance of the extracted signal phase track. 

Each time the modulating signal changes state, it takes at least one and
sometimes two clock cycles for the detected phase to fully respond. Two
clock cycles might be needed if, for example, the modulating signal changed
state right on top of a sine wave positive zero crossing, producing this
sequence of phase numbers: -.05, 0, and +.05 UI.  That happened on the first
rising edge of the extracted signal phase track. On the second rising edge,
the phase switched cleanly between two positive zero crossings of the sine
wave, producing an abrupt change in phase. The TRACK function linearly
interpolates that abrupt change, producing a linear ramp that lasts
precisely one clock period.  

The TIE@LEVEL track appears antipodal to the modulating signal for purely
semantic reasons. My modulating signal, when high, advances rising edges of
the clock. An advance in time, compared to the ideal internal reference
clock presents itself in the TIE track as a negative signal.


How the TIE function synthesizes its reference clock

The TIE function provides several choices for synthesizing its internal
reference clock. These choices profoundly affect the appearance of measured
jitter tracks.  This article contemplates only one method, the simplest one,
called "PLL_OFF", which is accessed under the TIE "VCLOCK" information tab. 

Given an input trace, the PLL_OFF method constructs one continuous,
single-frequency timing reference spanning the entire captured data record.
You may imagine that it divines the correct frequency this by simply
counting the number of edges observed in the allotted time of one sample
trace. 

The process of finding the correct frequency is activated by the "FIND
FREQUENCY" button under the "VCLOCK" tab of the TIE configuration screen.
Given the correct assumed frequency, the TIE function then creates a comb of
perfect clock edges at that frequency. Finally, it slides the comb back and
forth until it achieves the best alignment with the incoming signal. The
algorithmic details are considerably more complex; the "sliding comb" idea
presented here is only a simplified conceptual description.

Once the comb settles, the TIE@LEVEL measurement function makes up a list,
edge by edge, of the differences between each incoming signal edge and its
corresponding "ideal" position. The TIE function can, if requested, track
phase differences in excess of one clock period (something my simple jitter
generator cannot create). It can also, if asked, measure phase differences
between incoming data edges, both rising and falling, as opposed to just
using rising edges as I have configured this example. 


Self-referential nature of jitter measurements

Because the TIE@LEVEL function derives its internal reference clock from the
data itself, the TIE output is somewhat self-referential. What the TIE
function actually reports, when you really think about it, are local
deviations in phase compared to the average phase established by the
surrounding data record. 

If the average phase of the surrounding data record does not properly
represent the true average phase of the complete real-time input signal,
then the TIE function cannot do its job. In practical terms this means that:


You must capture a suitably long input data record in order for the TIE
function to work properly. 

The problem of deciding how much data to capture, in order that the TIE
function be able to synthesize a truly representative internal reference
clock, is one of a general class of problems in the field of statistics that
I shall discuss in my next article.

If you want to talk further about jitter, I'll be in Phoenix in November
2-5, 2009 and would be delighted to see you at one of my classes there. 

 

Best Regards,
Dr. Howard Johnson

 

  _____  

Our final public classes for 2009 will be in Phoenix, AZ during the first
week of November.  Registration is now open at  <http://www.sigcon.com/>
www.sigcon.com.  Use Promo Code NL9 for a $50 tuition discount (regular
tuition $1395).    See you in Phoenix!

A full schedule of classes is available at  <http://www.sigcon.com/>
www.sigcon.com.  

 


If you have an idea that would make a good topic for a future newsletter, 
please send it to  <mailto:info03@xxxxxxxxxx> info03@xxxxxxxxxx . 

To subscribe to this list send an email to
<mailto:hsdd-request@xxxxxxxxxxxxx?subject=subscribe>
hsdd-request@xxxxxxxxxxxxx 
with 'subscribe' in the subject field. 
To unsubscribe from this list send an email to
<mailto:hsdd-request@xxxxxxxxxxxxx?subject=unsubscribe>
hsdd-request@xxxxxxxxxxxxx 
with 'unsubscribe' in the subject field. 

Newsletter Archives at  <http://www.sigcon.com/publications.htm>
www.sigcon.com
 <http://www.sigcon.com/copyright.htm> C Copyright 2009, Signal Consulting,
Inc. All Rights Reserved.
  

        

GIF image

JPEG image

JPEG image

JPEG image

JPEG image

JPEG image

JPEG image

Other related posts:

  • » [hsdd] High-Speed Digital Design Newsletter - - Jitter Creation - Howard Johnson