[openbeos] Re: app_server: MMX/SSE help wanted
- From: "Axel Dörfler" <axeld@xxxxxxxxxxxxxxxx>
- To: openbeos@xxxxxxxxxxxxx
- Date: Mon, 09 Aug 2004 18:38:47 +0200 CEST
Adi Oanca <adioanca@xxxxxxxxxxxxxx> wrote:
> > With SSE and its extra registers, you need special OS support so
> > that the
> > registers are correctly stored and recalled during task switches.
> > As long
> > as the kernel supports this, no problem.
> > And if SSE works SSE2 should also work, as it doesn't add new
> > registers,
> > but only new commands to work on the 128-bit regs.
> Aha. OK.
> Axel, will our kernel support SSE too? What about HyperThreading(or
> this
> is == dual > processor)?
It will definitely support SSE, and I already purchased a P4 HT system
to be able to make sure that the latter won't be forgotten, too. I
won't make any promises at this point, though :)
> >> What about the case where app_server_MMX is compiled with
> > > GCC3_MMX ?
> >> Should GCC MMX support be disabled in this case?
> > Hm? MMX is nothing special, just some new x86 instructions. As long
> > as the
> > compiler/assembler supports translating them, there shouldn't be
> > any
> > special problems.
> OK, then let me ask you something:
> - MMX works in parallel with the CPU?
> - that means you can have an algorithm running on the CPU and some
> loops
> running on MMX unit at the same time?
> - If this is the case, there must be a synchronization mechanism.
> This is how I thought MMX is used.
> BUT, it seems it is used more like this:
> - Enter MMX mode.
> - Execute MMX_code_loops (CPU is idle this time. (???)).
> - Exit MMX mode.
> - Continue execution of my thread.
> Is this correct?
> I made the wrong assumption that MMX is a... core of its own, and
> that in the same time the > CPU could process something else. Guess I
was wrong!(?)
A CPU is a complex beast nowadays, and like it will feature several
integer units that you cannot address separately, it will also contain
some curcuit to realize MMX.
The fact is that you should not make (too m)any assumptions on how the
CPU is processing your code. The only hint that you have is that there
is only one unit parsing the input, that is, you put all your code
instruction after instruction into the CPU, no matter if it's an MMX,
SSE or standard x86 instruction. And you can assume that it operates on
that code something like in order, at least as much in order so that
your code stays correct.
Wether or not it's internally handled by different units you don't
know. Your compiler will try to order your instructions to let the CPU
handle this stuff as independently as possible. And if your writing
assembly directly, that's your job, too.
Bye,
Axel.
Other related posts:
