[haiku-development] Re: [patch] x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support

  • From: Yongcong Du <ycdu.vmcore@xxxxxxxxx>
  • To: haiku-development@xxxxxxxxxxxxx
  • Date: Sun, 8 Apr 2012 11:55:46 +0800

Dear all,

On Sat, Apr 7, 2012 at 6:18 PM, Yongcong Du <ycdu.vmcore@xxxxxxxxx> wrote:

> Dear all,
>
>
> On Sat, Apr 7, 2012 at 4:33 PM, Yongcong Du <ycdu.vmcore@xxxxxxxxx> wrote:
>
>> Dear List,
>>
>>
>> On Sat, Apr 7, 2012 at 4:21 PM, Yongcong Du <ycdu.vmcore@xxxxxxxxx>wrote:
>>
>>> Dear list,
>>>
>>> In my gsoc proposal, I mentioned the local APIC timer issue--APIC timers
>>> may be shutdown when entering deeper C-States. For intel CPUs, this issue
>>> will only happen after we adds the so called cpuidle support. But for AMD
>>> CPUs, I think we already have this problem. Please refer to
>>> http://dev.haiku-os.org/ticket/8111 for details. But I'm not sure
>>> whether the root cause of #8111 is the APIC issue.
>>>
>>> Hi Luposian,
>>> Would you please help to try the patch?
>>>
>>> Thanks in advance,
>>> Yongcong
>>>
>>> The patch is attached. Here is the copied commit msg.
>>>
>>> commit 694ea35b57f0e2d11b5b567e46baff10e488ae30
>>> Author: Yongcong Du <ycdu.vmcore@xxxxxxxxx>
>>> Date:   Sat Apr 7 16:07:29 2012 +0800
>>>
>>>     x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support
>>>
>>>     AMD C1E is a BIOS controlled C3 state. Certain processors families
>>>     may cut off TSC and the lapic timer when it is in a deep C state,
>>>     including C1E state, thus the cpu can't be waken up and system will
>>> hang.
>>>
>>>     This patch firstly adds the support of idle selection during boot.
>>> Then
>>>     it implemnts amdc1e_noarat_idle() routine which checks the MSR which
>>>     contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27)  before
>>>     executing the halt instruction, then clear them once set.
>>>
>>>     This patch may fix http://dev.haiku-os.org/ticket/8111
>>>
>>>     References:
>>>     BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors
>>>
>>
>>
>> The real fix should be switch to another reliable timer before hlt
>> instruction. But this need more haiku timer subsystem changes. I put this
>> into goal after gsoc.
>>
>> The idle routine selection support is also needed by my cpuidle project.
>> To achieve this goal,  we can change the global arch_cpu_idle() as a
>> function pointer or just do as my patch does. The former is cleaner and no
>> function call overhead, the later doesn't impact other architecture. My
>> question is which way do you prefer?
>>
>> Thanks
>>
>
> New patch is attached in the ticket. Changes are coding style clean up, no
> functional change.
>
> Thanks
>

update the patch again in the ticket.

Changes:
fix one spell error.
add more tickets may be fixed by this patch. Thanks mmadia for pointing out.
add description of difference between intel c1e and amd c1e.

Thanks

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