[haiku-development] Re: On timeslices and cycles
- From: Christian Packmann <Christian.Packmann@xxxxxx>
- To: haiku-development@xxxxxxxxxxxxx
- Date: Fri, 13 Mar 2009 12:12:27 +0100
André Braga - 2009-03-13 00:08 :
What happens when you have asymmetric multiprocessors, like for
example in an hypothetical motherboard that can support both an Atom
and a Core processor on separate sockets?
In this case, someone gets sent to the lunatic asylum. If you need the
performance of a Core2 but low power, you use a ULV variant.
This is an unlikely example,
Impossible is more like it. :-) But there are true asymmetric systems:
FPGA coprocessors which can be plugged into Opteron mainboards. And
Roadrunner uses a mixture of Opterons and PowerXCell 8i's. The OS always
runs on the Opterons in these cases, just scheduling tasks to run on those
coprocessors. And this is not really different from Windows' DirectX
drivers scheduling tasks to run on my GPU. So, this is really boring
everyday stuff.
but there already exists research on this regard for desktop products,
Hm, what designs? Apart from graphics, sound, PhysX and RAID cards, I mean.
and there *are* such products for embedded markets.
See above. Resources will usually be handled by one master CPU running the
OS to perform specific tasks on the slave processors. This doesn't affect
the OS itself. Actually, I ran an AMP system 22 years ago. On my Amiga
1000, the 68000 was the master CPU handling the independently running
Blitter and Copper coprocessors; even though these could issue interrupts
of their own, they never entered into the OS management picture. And of
course my PC here is an AMP design, as well.
This is really of no importance to the general OS scheduler. When you get
coprocessors, you write drivers and userland management routines for them
and these are handled by your master CPU.
> A more familiar
example is "advanced" clock throttling where each core can be
throttled independently, such as in AM2+ Phenoms. AFAICT those are not
user-controllable (independently, I mean), but I see no reason why
future products can't have this feature.
Probably not in x86 space. The independent power-throttling on Barcelona
lead to serious performance problems when threads were rescheduled. The
Cool'n'Quiet drivers wouldn't ramp running cores up fast enough, leading
to inconsistent runtime behavior. AFAIK AMD has removed this feature from
Shanghai/Phenom II because of these problems. It would probably be better
to dynamically shut off the idling cores, at least partially, like PA-Semi
did with its PowerPC designs. I guess that Intel/AMD will look into this;
the results PA-Semi achieved were really impressive.
Christian
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