[haiku-commits] r41463 - haiku/trunk/src/add-ons/accelerants/radeon_hd
- From: kallisti5@xxxxxxxxxxx
- To: haiku-commits@xxxxxxxxxxxxx
- Date: Thu, 12 May 2011 18:58:50 +0200 (CEST)
Author: kallisti5
Date: 2011-05-12 18:58:49 +0200 (Thu, 12 May 2011)
New Revision: 41463
Changeset: https://dev.haiku-os.org/changeset/41463
Modified:
haiku/trunk/src/add-ons/accelerants/radeon_hd/accelerant_protos.h
haiku/trunk/src/add-ons/accelerants/radeon_hd/hooks.cpp
haiku/trunk/src/add-ons/accelerants/radeon_hd/mode.cpp
Log:
add hook to pass EDID back if requested by userspace (screen applet); fix
calculation of H blankStart; correct typo on H_SYNC vs V_SYNC register; set +/-
V_SYNC to 0x01 vs 0x02.. this prob still needs work; style corrections
Modified: haiku/trunk/src/add-ons/accelerants/radeon_hd/accelerant_protos.h
===================================================================
--- haiku/trunk/src/add-ons/accelerants/radeon_hd/accelerant_protos.h
2011-05-12 04:51:36 UTC (rev 41462)
+++ haiku/trunk/src/add-ons/accelerants/radeon_hd/accelerant_protos.h
2011-05-12 16:58:49 UTC (rev 41463)
@@ -1,9 +1,10 @@
/*
- * Copyright 2006-2007, Haiku, Inc. All Rights Reserved.
+ * Copyright 2006-2011, Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* Axel Dörfler, axeld@xxxxxxxxxxxxxxxx
+ * Alexander von Gluck, kallisti5@xxxxxxxxxxx
*/
#ifndef ACCELERANT_PROTOS_H
#define ACCELERANT_PROTOS_H
@@ -29,12 +30,15 @@
status_t radeon_set_display_mode(display_mode *mode);
status_t radeon_get_display_mode(display_mode *currentMode);
status_t radeon_get_frame_buffer_config(frame_buffer_config *config);
-status_t radeon_get_pixel_clock_limits(display_mode *mode, uint32 *low, uint32
*high);
+status_t radeon_get_pixel_clock_limits(display_mode *mode,
+ uint32 *low, uint32 *high);
+status_t radeon_get_edid_info(void* info, size_t size, uint32* edid_version);
// accelerant engine
status_t radeon_acquire_engine(uint32 capabilities, uint32 maxWait,
- sync_token *syncToken, engine_token **_engineToken);
-status_t radeon_release_engine(engine_token *engineToken, sync_token
*syncToken);
+ sync_token *syncToken, engine_token **_engineToken);
+status_t radeon_release_engine(engine_token *engineToken,
+ sync_token *syncToken);
#ifdef __cplusplus
Modified: haiku/trunk/src/add-ons/accelerants/radeon_hd/hooks.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/radeon_hd/hooks.cpp 2011-05-12
04:51:36 UTC (rev 41462)
+++ haiku/trunk/src/add-ons/accelerants/radeon_hd/hooks.cpp 2011-05-12
16:58:49 UTC (rev 41463)
@@ -40,6 +40,8 @@
return (void*)radeon_set_display_mode;
case B_GET_DISPLAY_MODE:
return (void*)radeon_get_display_mode;
+ case B_GET_EDID_INFO:
+ return (void*)radeon_get_edid_info;
case B_GET_FRAME_BUFFER_CONFIG:
return (void*)radeon_get_frame_buffer_config;
Modified: haiku/trunk/src/add-ons/accelerants/radeon_hd/mode.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/radeon_hd/mode.cpp 2011-05-12
04:51:36 UTC (rev 41462)
+++ haiku/trunk/src/add-ons/accelerants/radeon_hd/mode.cpp 2011-05-12
16:58:49 UTC (rev 41463)
@@ -76,6 +76,22 @@
}
+status_t
+radeon_get_edid_info(void* info, size_t size, uint32* edid_version)
+{
+ TRACE("%s\n", __func__);
+ if (!gInfo->shared_info->has_edid)
+ return B_ERROR;
+ if (size < sizeof(struct edid1_info))
+ return B_BUFFER_OVERFLOW;
+
+ memcpy(info, &gInfo->shared_info->edid_info, sizeof(struct edid1_info));
+ *edid_version = EDID_VERSION_1;
+
+ return B_OK;
+}
+
+
static void
get_color_space_format(const display_mode &mode, uint32 &colorMode,
uint32 &bytesPerRow, uint32 &bitsPerPixel)
@@ -133,7 +149,7 @@
write32(regOffset + D1CRTC_H_TOTAL, displayTiming.h_total - 1);
// determine blanking based on passed modeline
- uint16 blankStart = displayTiming.h_display;
+ uint16 blankStart = displayTiming.h_display + 1;
uint16 blankEnd = displayTiming.h_total;
write32(regOffset + D1CRTC_H_BLANK_START_END,
@@ -144,7 +160,7 @@
// set flag for neg. H sync
if (displayTiming.flags & ~B_POSITIVE_HSYNC)
- write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x01);
+ write32(regOffset + D1CRTC_H_SYNC_A_CNTL, 0x01);
// *** Vertical
write32(regOffset + D1CRTC_V_TOTAL, displayTiming.v_total - 1);
@@ -169,7 +185,7 @@
// set flag for neg. V sync
if (displayTiming.flags & ~B_POSITIVE_VSYNC)
- write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x02);
+ write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x01);
/* set D1CRTC_HORZ_COUNT_BY2_EN to 0;
should only be set to 1 on 30bpp DVI modes
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