>> # set the linker and linker flags >> - LD := gcc >> + LD ?= gcc > > Have you checked all cases and side effects of this modification before > commiting? That breaks my builds with following message: > ====== > ld -o "objects.x86-gcc4-debug/Tolmach" objects.x86-gcc4-debug/TolmachApp.o > objects.x86-gcc4-debug/Preferences.o objects.x86-gcc4-debug/TolmachWin.o > objects.x86-gcc4-debug/TolmachView.o objects.x86-gcc4-debug/PGBHandler.o > objects.x86-gcc4-debug/PGBIndex.o -g -Xlinker -soname=_APP_ -L./ -lroot > -lbe -ltextencoding -lstdc++ -llocale -llocalestub > ld: cannot find -linker > ====== Looks like only gcc frontend is currently supported as linker command. To allow LD overload, the LDFLAGS must be accomodate to support it. > By the way, the makefile-engine have at the top some samples of another way > of redefining variables: > ====== > 16 ifeq ($(NAME), ) > 17 NAME = NameThisApp > 18 endif > ====== > > and, I found such mixture of styles not a good idea. :-( Well, checking that a variable is already defined or that is value is empty is not exactly the same. The ?= form will not detect the case when NAME is already defined but it's value is empty: NAME='' make The current code don't care about overloading value, it cares about... about... non-emptiness. (is that even a word!?). And the make syntax don't allow much way to check that. Bye, Philippe.