hrev53872 adds 1 changeset to branch 'master'
old head: 27fee67244859dd4e91c6a4deb16406cdc6994ba
new head: 1a836b9e04e9eb36f8ee95eeb0af0bbcc31c40e3
overview:
https://git.haiku-os.org/haiku/log/?qt=range&q=1a836b9e04e9+%5E27fee6724485
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1a836b9e04e9: kernel: x86: add some more cpuid flags.
Change-Id: If81c8e38c4e5a8347b5818440a7516298be585bc
Reviewed-on: https://review.haiku-os.org/c/haiku/+/2242
Reviewed-by: Jérôme Duval <jerome.duval@xxxxxxxxx>
[ Jérôme Duval <jerome.duval@xxxxxxxxx> ]
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Revision: hrev53872
Commit: 1a836b9e04e9eb36f8ee95eeb0af0bbcc31c40e3
URL: https://git.haiku-os.org/haiku/commit/?id=1a836b9e04e9
Author: Jérôme Duval <jerome.duval@xxxxxxxxx>
Date: Wed Feb 12 16:43:21 2020 UTC
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2 files changed, 19 insertions(+), 3 deletions(-)
headers/private/kernel/arch/x86/arch_cpu.h | 10 ++++++++--
src/system/kernel/arch/x86/arch_cpu.cpp | 12 +++++++++++-
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diff --git a/headers/private/kernel/arch/x86/arch_cpu.h
b/headers/private/kernel/arch/x86/arch_cpu.h
index e4ea1e21fb..69d849da54 100644
--- a/headers/private/kernel/arch/x86/arch_cpu.h
+++ b/headers/private/kernel/arch/x86/arch_cpu.h
@@ -198,6 +198,7 @@
#define IA32_FEATURE_AMD_EXT_NX (1 << 20) // no execute
bit
#define IA32_FEATURE_AMD_EXT_MMXEXT (1 << 22) // mmx extensions
#define IA32_FEATURE_AMD_EXT_FFXSR (1 << 25) // fast FXSAVE/FXRSTOR
+#define IA32_FEATURE_AMD_EXT_PDPE1GB (1 << 26) // Gibibyte pages
#define IA32_FEATURE_AMD_EXT_RDTSCP (1 << 27) // rdtscp instruction
#define IA32_FEATURE_AMD_EXT_LONG (1 << 29) // long mode
#define IA32_FEATURE_AMD_EXT_3DNOWEXT (1 << 30) // 3DNow! extensions
@@ -207,6 +208,7 @@
// available on Intel processors
#define IA32_FEATURES_INTEL_EXT
(IA32_FEATURE_AMD_EXT_SYSCALL \
| IA32_FEATURE_AMD_EXT_NX \
+
| IA32_FEATURE_AMD_EXT_PDPE1GB \
| IA32_FEATURE_AMD_EXT_RDTSCP \
| IA32_FEATURE_AMD_EXT_LONG)
@@ -286,13 +288,17 @@
#define IA32_FEATURE_STIBP (1 << 27) // STIBP
Speculation Control
#define IA32_FEATURE_L1D_FLUSH (1 << 28) // L1D_FLUSH supported
#define IA32_FEATURE_ARCH_CAPABILITIES (1 << 29) //
IA32_ARCH_CAPABILITIES MSR
-#define IA32_FEATURE_SSBD (1 << 30) // Speculative
Store Bypass Disable
+#define IA32_FEATURE_SSBD (1 << 31) // Speculative
Store Bypass Disable
// x86 defined features from cpuid eax 0x80000007, edx register
#define IA32_FEATURE_INVARIANT_TSC (1 << 8)
// x86 defined features from cpuid eax 0x80000008, ebx register
-#define IA32_FEATURE_AMD_EXT_IBPB (1 << 12) /* IBPB Support only
(no IBRS) */
+#define IA32_FEATURE_CLZERO (1 << 0) // CLZERO
instruction
+#define IA32_FEATURE_IBPB (1 << 12) // IBPB Support
only (no IBRS)
+#define IA32_FEATURE_AMD_SSBD (1 << 24) // Speculative Store
Bypass Disable
+#define IA32_FEATURE_VIRT_SSBD (1 << 25) // Virtualized
Speculative Store Bypass Disable
+#define IA32_FEATURE_AMD_SSB_NO (1 << 26) // Speculative
Store Bypass is fixed in hardware
// Memory type ranges
diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp
b/src/system/kernel/arch/x86/arch_cpu.cpp
index 653e43dd71..7f735b977d 100644
--- a/src/system/kernel/arch/x86/arch_cpu.cpp
+++ b/src/system/kernel/arch/x86/arch_cpu.cpp
@@ -462,6 +462,8 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
strlcat(features, "mmxext ", sizeof(features));
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_FFXSR)
strlcat(features, "ffxsr ", sizeof(features));
+ if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_PDPE1GB)
+ strlcat(features, "pdpe1gb ", sizeof(features));
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_LONG)
strlcat(features, "long ", sizeof(features));
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_3DNOWEXT)
@@ -552,8 +554,16 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
strlcat(features, "msr_arch ", sizeof(features));
if (cpu->arch.feature[FEATURE_7_EDX] & IA32_FEATURE_SSBD)
strlcat(features, "ssbd ", sizeof(features));
- if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_EXT_IBPB)
+ if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_CLZERO)
+ strlcat(features, "clzero ", sizeof(features));
+ if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_IBPB)
strlcat(features, "ibpb ", sizeof(features));
+ if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_SSBD)
+ strlcat(features, "amd_ssbd ", sizeof(features));
+ if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_VIRT_SSBD)
+ strlcat(features, "virt_ssbd ", sizeof(features));
+ if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_SSB_NO)
+ strlcat(features, "amd_ssb_no ", sizeof(features));
dprintf("CPU %d: features: %s\n", currentCPU, features);
}
#endif // DUMP_FEATURE_STRING
