[haiku-commits] haiku: hrev46865 - src/system/kernel/arch/arm/paging
- From: kallisti5@xxxxxxxxxxx
- To: haiku-commits@xxxxxxxxxxxxx
- Date: Thu, 13 Feb 2014 06:50:28 +0100 (CET)
hrev46865 adds 1 changeset to branch 'master'
old head: 35171b073dc15f5d6a487135787f82a8484ab0ed
new head: abcbb5d6179c4a63f74858a207db702315511efb
overview: http://cgit.haiku-os.org/haiku/log/?qt=range&q=abcbb5d+%5E35171b0
----------------------------------------------------------------------------
abcbb5d: arm/paging: Convert to new-style CPU management
* Aka, post-scheduler changes
* Luckily ARM paging code is very simular to x86 paging
[ Alexander von Gluck IV <kallisti5@xxxxxxxxxxx> ]
----------------------------------------------------------------------------
Revision: hrev46865
Commit: abcbb5d6179c4a63f74858a207db702315511efb
URL: http://cgit.haiku-os.org/haiku/commit/?id=abcbb5d
Author: Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Date: Thu Feb 13 05:54:35 2014 UTC
----------------------------------------------------------------------------
4 files changed, 18 insertions(+), 14 deletions(-)
.../kernel/arch/arm/paging/ARMPagingStructures.cpp | 3 +--
.../kernel/arch/arm/paging/ARMPagingStructures.h | 4 +++-
.../kernel/arch/arm/paging/ARMVMTranslationMap.cpp | 14 ++++++++------
.../paging/arm_physical_page_mapper_large_memory.cpp | 11 ++++++-----
----------------------------------------------------------------------------
diff --git a/src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp
b/src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp
index 3c778c1..5f06adb 100644
--- a/src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp
+++ b/src/system/kernel/arch/arm/paging/ARMPagingStructures.cpp
@@ -9,8 +9,7 @@
ARMPagingStructures::ARMPagingStructures()
:
- ref_count(1),
- active_on_cpus(0)
+ ref_count(1)
{
}
diff --git a/src/system/kernel/arch/arm/paging/ARMPagingStructures.h
b/src/system/kernel/arch/arm/paging/ARMPagingStructures.h
index 61887b0..c89b2c5 100644
--- a/src/system/kernel/arch/arm/paging/ARMPagingStructures.h
+++ b/src/system/kernel/arch/arm/paging/ARMPagingStructures.h
@@ -14,11 +14,13 @@
#include <heap.h>
+#include <smp.h>
+
struct ARMPagingStructures : DeferredDeletable {
uint32 pgdir_phys;
int32 ref_count;
- vint32 active_on_cpus;
+ CPUSet active_on_cpus;
// mask indicating on which CPUs the map is currently used
ARMPagingStructures();
diff --git a/src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp
b/src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp
index 1f94eba..a4c3c48 100644
--- a/src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp
+++ b/src/system/kernel/arch/arm/paging/ARMVMTranslationMap.cpp
@@ -113,9 +113,10 @@ ARMVMTranslationMap::Flush()
restore_interrupts(state);
int cpu = smp_get_current_cpu();
- uint32 cpuMask = PagingStructures()->active_on_cpus
- & ~((uint32)1 << cpu);
- if (cpuMask != 0) {
+ CPUSet cpuMask = PagingStructures()->active_on_cpus;
+ cpuMask.ClearBit(cpu);
+
+ if (!cpuMask.IsEmpty()) {
smp_send_multicast_ici(cpuMask,
SMP_MSG_USER_INVALIDATE_PAGES,
0, 0, 0, NULL, SMP_MSG_FLAG_SYNC);
}
@@ -132,9 +133,10 @@ ARMVMTranslationMap::Flush()
SMP_MSG_FLAG_SYNC);
} else {
int cpu = smp_get_current_cpu();
- uint32 cpuMask = PagingStructures()->active_on_cpus
- & ~((uint32)1 << cpu);
- if (cpuMask != 0) {
+ CPUSet cpuMask = PagingStructures()->active_on_cpus;
+ cpuMask.ClearBit(cpu);
+
+ if (!cpuMask.IsEmpty()) {
smp_send_multicast_ici(cpuMask,
SMP_MSG_INVALIDATE_PAGE_LIST,
(addr_t)fInvalidPages,
fInvalidPagesCount, 0, NULL,
SMP_MSG_FLAG_SYNC);
diff --git
a/src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp
b/src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp
index ad3dde3..73330ac 100644
---
a/src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp
+++
b/src/system/kernel/arch/arm/paging/arm_physical_page_mapper_large_memory.cpp
@@ -112,7 +112,7 @@ private:
struct page_slot {
PhysicalPageSlot* slot;
phys_addr_t physicalAddress;
- cpu_mask_t valid;
+ CPUSet valid;
};
page_slot
fSlots[SLOTS_PER_TRANSLATION_MAP];
@@ -174,7 +174,7 @@ private:
PhysicalPageSlot* fDebugSlot;
PhysicalPageSlotPool* fInitialPool;
LargeMemoryTranslationMapPhysicalPageMapper
fKernelMapper;
- PhysicalPageOpsCPUData fPerCPUData[B_MAX_CPU_COUNT];
+ PhysicalPageOpsCPUData fPerCPUData[SMP_MAX_CPUS];
};
static LargeMemoryPhysicalPageMapper sPhysicalPageMapper;
@@ -396,11 +396,11 @@
LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
page_slot& slot = fSlots[i];
if (slot.physicalAddress == physicalAddress) {
fNextSlot = (i + 1) & (fSlotCount - 1);
- if ((slot.valid & (1 << currentCPU)) == 0) {
+ if (!slot.valid.GetBit(currentCPU)) {
// not valid on this CPU -- invalidate the TLB
entry
arch_cpu_invalidate_TLB_range(slot.slot->address,
slot.slot->address + B_PAGE_SIZE);
- slot.valid |= 1 << currentCPU;
+ slot.valid.SetBit(currentCPU);
}
return (void*)slot.slot->address + off;
}
@@ -412,7 +412,8 @@ LargeMemoryTranslationMapPhysicalPageMapper::GetPageTableAt(
slot.physicalAddress = physicalAddress;
slot.slot->Map(physicalAddress);
- slot.valid = 1 << currentCPU;
+ slot.valid.ClearAll();
+ slot.valid.SetBit(currentCPU);
return (void*)slot.slot->address + off;
}
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