[haiku-commits] BRANCH pdziepak-github.memcpy [e2c1322] src/system/boot/platform/bios_ia32 src/system/kernel/arch/x86 headers/private/kernel/arch/x86

  • From: pdziepak-github.memcpy <community@xxxxxxxxxxxx>
  • To: haiku-commits@xxxxxxxxxxxxx
  • Date: Sat, 6 Sep 2014 19:46:34 +0200 (CEST)

added 1 changeset to branch 'refs/remotes/pdziepak-github/memcpy'
old head: ae2225bf9a0b7bcfa36ba65cd63b6134c554bce5
new head: e2c1322cb0355f9cea2151cbc871ce0db6252ae4
overview: https://github.com/pdziepak/Haiku/compare/ae2225b...e2c1322

----------------------------------------------------------------------------

e2c1322: boot/x86_64: enable sse early
  
  Enable SSE as a part of the "preparation of the environment to run any
  C or C++ code" in the entry points of stage2 bootloader.
  
  SSE2 is going to be used by memset() and memcpy().
  
  Signed-off-by: Paweł Dziepak <pdziepak@xxxxxxxxxxx>

                                    [ Paweł Dziepak <pdziepak@xxxxxxxxxxx> ]

----------------------------------------------------------------------------

Commit:      e2c1322cb0355f9cea2151cbc871ce0db6252ae4
Author:      Paweł Dziepak <pdziepak@xxxxxxxxxxx>
Date:        Sat Sep  6 17:29:11 2014 UTC

----------------------------------------------------------------------------

4 files changed, 17 insertions(+), 8 deletions(-)
headers/private/kernel/arch/x86/arch_cpu.h   | 8 ++++++++
src/system/boot/platform/bios_ia32/long.cpp  | 3 +++
src/system/boot/platform/bios_ia32/start.cpp | 6 ++++++
src/system/kernel/arch/x86/arch_cpu.cpp      | 8 --------

----------------------------------------------------------------------------

diff --git a/headers/private/kernel/arch/x86/arch_cpu.h 
b/headers/private/kernel/arch/x86/arch_cpu.h
index 800f489..c6d4c11 100644
--- a/headers/private/kernel/arch/x86/arch_cpu.h
+++ b/headers/private/kernel/arch/x86/arch_cpu.h
@@ -243,6 +243,14 @@
        | X86_EFLAGS_AUXILIARY_CARRY | X86_EFLAGS_ZERO | X86_EFLAGS_SIGN \
        | X86_EFLAGS_DIRECTION | X86_EFLAGS_OVERFLOW)
 
+#define CR0_CACHE_DISABLE              (1UL << 30)
+#define CR0_NOT_WRITE_THROUGH  (1UL << 29)
+#define CR0_FPU_EMULATION              (1UL << 2)
+#define CR0_MONITOR_FPU                        (1UL << 1)
+
+#define CR4_OS_FXSR                            (1UL << 9)
+#define CR4_OS_XMM_EXCEPTION   (1UL << 10)
+
 
 // iframe types
 #define IFRAME_TYPE_SYSCALL                            0x1
diff --git a/src/system/boot/platform/bios_ia32/long.cpp 
b/src/system/boot/platform/bios_ia32/long.cpp
index dac3c84..1012b9c 100644
--- a/src/system/boot/platform/bios_ia32/long.cpp
+++ b/src/system/boot/platform/bios_ia32/long.cpp
@@ -286,6 +286,9 @@ long_smp_start_kernel(void)
        asm("movl %%eax, %%cr0" : : "a" ((1 << 31) | (1 << 16) | (1 << 5) | 1));
        asm("cld");
        asm("fninit");
+       // Enable SSE2.
+       x86_write_cr4(x86_read_cr4() | CR4_OS_FXSR | CR4_OS_XMM_EXCEPTION);
+       x86_write_cr0(x86_read_cr0() & ~(CR0_FPU_EMULATION | CR0_MONITOR_FPU));
 
        // Fix our kernel stack address.
        gKernelArgs.cpu_kstack[cpu].start
diff --git a/src/system/boot/platform/bios_ia32/start.cpp 
b/src/system/boot/platform/bios_ia32/start.cpp
index 7222ff3..574f270 100644
--- a/src/system/boot/platform/bios_ia32/start.cpp
+++ b/src/system/boot/platform/bios_ia32/start.cpp
@@ -178,6 +178,12 @@ _start(void)
        asm("cld");                     // Ain't nothing but a GCC thang.
        asm("fninit");          // initialize floating point unit
 
+#ifdef __x86_64__
+       // Enable SSE2.
+       x86_write_cr4(x86_read_cr4() | CR4_OS_FXSR | CR4_OS_XMM_EXCEPTION);
+       x86_write_cr0(x86_read_cr0() & ~(CR0_FPU_EMULATION | CR0_MONITOR_FPU));
+#endif
+
        clear_bss();
        call_ctors();
                // call C++ constructors before doing anything else
diff --git a/src/system/kernel/arch/x86/arch_cpu.cpp 
b/src/system/kernel/arch/x86/arch_cpu.cpp
index 8a2f783..6cd2628 100644
--- a/src/system/kernel/arch/x86/arch_cpu.cpp
+++ b/src/system/kernel/arch/x86/arch_cpu.cpp
@@ -59,14 +59,6 @@ static const struct cpu_vendor_info vendor_info[VENDOR_NUM] 
= {
        { "NSC", { "Geode by NSC" } },
 };
 
-#define CR0_CACHE_DISABLE              (1UL << 30)
-#define CR0_NOT_WRITE_THROUGH  (1UL << 29)
-#define CR0_FPU_EMULATION              (1UL << 2)
-#define CR0_MONITOR_FPU                        (1UL << 1)
-
-#define CR4_OS_FXSR                            (1UL << 9)
-#define CR4_OS_XMM_EXCEPTION   (1UL << 10)
-
 #define K8_SMIONCMPHALT                        (1ULL << 27)
 #define K8_C1EONCMPHALT                        (1ULL << 28)
 


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