[ell-i-developers] Re: About type correctness

  • From: Ivan Raul <supra.material@xxxxxxxxx>
  • Date: Mon, 17 Feb 2014 22:10:38 +0200

> > Also I'm putting close attention at the alignment to 8 bytes that the
> stack should have when entering interrupts, to prevent any problem at later
> stages.
> Please a reference to the documentation?  I don't remember such a
> requirement, but most probably my memory fails here.  I thought 4 byte
> alignment would be enough.

In ARMv6-M Architecture Reference
page 227, section B1.5.7

*The ARMv6-M architecture guarantees that all exceptions are entered with
8-byte stack alignment. However, because exceptions can occur on any
instruction boundary, it is possible that the current stack pointer is not
8-byte aligned when an exception activates.*

The exception entry and return may adjust the stack accordingly:

*On an exception entry, the exception entry sequence ensures that the stack
pointer in use before the exception entry has 8-byte alignment, by
adjusting its alignment if necessary. When the processor pushes the PSR
value to the stack it uses bit[9] of the stacked PSR value to indicate
whether it realigned the stack.On an exception return, the processor uses
the value of bit [9] of the PSR value popped from the stack to determine
whether it must adjust the stack pointer alignment. This reverses any
forced stack alignment performed on the exception entry.*
I was checking and GCC automatically aligns all user defined methods to 8
bytes. Actually, it is transparent for the programmer. Even in exceptions.

The only point it attracted my attention is that ChibiOS generated 8 byte
aligned contexts. The point is that they generated false contexts for their
application. In that sense, it would be necessary to align the contexts,
but if our application does not need to do it, then it is not necessary, or
is it?

Best Regards, Ivan

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