Stefan Döhla wrote:
My old Toshiba Portege notebook was in former times running with a 64 entry RAMDAC. The range was from 0x0000 to 0xffff - and it worked!
The code will work as long as the per component frame buffer depth matches the number of entries in the RAMDAC, so if the frame buffer is 6 bits (total 18 for RGB), then 64 entries will be fine. The problem is in dealing with a limited depths screen, and having any knowledge of how the frame buffer is wired to the RAMDAC. If you've got 6 bits and 256 entries, how is it arranged ? Which entries get used, and which don't ?
This was with XFree86 some time ago until I updated to X.org (some current version - not exactly sure which one) - and there setting RAMDAC values only works with a 24 bit depth visual.
I suspect some of the driver writers are a bit slack on how they handle the RAMDAC access, because they don't see it as important. The lack of individual access to CRTC RAMDAC's on the nVidia and ATI multi-screen drivers is another example of this. The new version of RandR promises to fix this, although access to the DDC channel for each display is still an issue (the X server reads the EDID, but doesn't then facilitate further communications.) Graeme Gill.