Posts for si-list, 09-2007

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  1. » [SI-LIST] Re: Conductor loss reduction at High Frequency, Yuriy Shlepnev
  2. » [SI-LIST] hapice simulation of Z_tdr, Dmitriev-Zdorov, Vladimir
  3. » [SI-LIST] Re: the difference of current profile between power supply path, signal path and return path in a circuit loop, tao xu
  4. » [SI-LIST] Reg: Single sided PCB Antenna, praveen
  5. » [SI-LIST] USB full-speed (*not* high-speed) layout and stubs., Andrew Morley
  6. » [SI-LIST] Single sided PCB Antenna, RameshK Cozerv IN HO
  7. » [SI-LIST] Re: How to properly simulate signal integrity across PCBs interconnected by Flex?, Loyer, Jeff
  8. » [SI-LIST] Re: Reg: Single sided PCB Antenna, olaney
  9. » [SI-LIST] Split Power Planes, sunil bharadwaz
  10. » [SI-LIST] Re: Resonant Modes, Ansoft presentation slides posted, Istvan Novak - Board Design Technology
  11. » [SI-LIST] Re: Power Distribution Modeling Techniques, extended TOC of book posted, Istvan Novak - Board Design Technology
  12. » [SI-LIST] Re: high speed trace @ 5Gbps, lifeatthesharpend
  13. » [SI-LIST] Signal Integrity Engineer opening at QUALCOMM Inc., Schnable, Jeff
  14. » [SI-LIST] Cisco Systems Opportunity - Signal Integrity Tech Lead (Focus on ASIC development and design) San Jose, Dale Hamilton -X (dalhamil - Spherion at Cisco)
  15. » [SI-LIST] Final Reminder: Ansoft Worldwide Application Workshop in Bangalore (11 September 2007), Alex Teo
  16. » [SI-LIST] logical question, mostafa_elwakeel
  17. » [SI-LIST] how to add Enable circuit for Anlog circuit, navaram kumar
  18. » [SI-LIST] Suggestion for lowering the temperature, art_porter
  19. » [SI-LIST] Agenda, Asian IBIS Summit (Japan), September 14, 2007 - Agenda, Mirmak, Michael
  20. » [SI-LIST] Re: Measuring Characteristic Impedance of a PCB trace, spamtrap1@xxxxxxxx
  21. » [SI-LIST] IBIS Model for Freescale MC68302, mohit jain
  22. » [SI-LIST] Re: IBIS Model for Freescale MC68302, olaney
  23. » [SI-LIST] BGA land pattern, Umesha
  24. » [SI-LIST] Re: PCI Express Simulation @ 5Gbps (Gen2 Speed), Clewell, Craig
  25. » [SI-LIST] Fluorescent light noise, Doug Smith
  26. » [SI-LIST] SATA II 3.0Gbps, npatel
  27. » [SI-LIST] Re: SATA II 3.0Gbps, Jory McKinley
  28. » [SI-LIST] Re: Low Load Probe Suggestions, olaney
  29. » [SI-LIST] Re: fiber-weave effect alive and well?, Russell S. Dudek Jr.
  30. » [SI-LIST] Ansoft Worldwide Application Workshop in China (Beijing Sept 18; Chengdu Sept 19; Shanghai Sept 20), Wenjie Mao
  31. » [SI-LIST] How to model IC current in spice, Joel Brown
  32. » [SI-LIST] Say Hello, Cortex Y.C. Chen
  33. » [SI-LIST] S-params vs. TDR/TDT results, Loyer, Jeff
  34. » [SI-LIST] duplicates from si-list, Loyer, Jeff
  35. » [SI-LIST] What do you think of your present EDA tools for SI and PI design and analysis?, Daniel Payne
  36. » [SI-LIST] Re: What do you think of your present EDA tools for SI and PI design and analysis?, Jory McKinley
  37. » [SI-LIST] why 75/150 ohms in ODT?, Canes Venatici
  38. » [SI-LIST] Asian IBIS Summit Presentations On-line!, Mirmak, Michael
  39. » [SI-LIST] CIE-SF 2007 Annual Short Course Fall Sessions Sponsored by CIE-SF EPMC and SJSU, Jin Zhao
  40. » [SI-LIST] Balun measurement, john
  41. » [SI-LIST] masking of PCB from x-rays, ThomasKoshy Conzerv IN HO Sr Technical Lead iLabs
  42. » [SI-LIST] Re: masking of PCB from x-rays, Clewell, Craig
  43. » [SI-LIST] Need Freelance Circuit Designer for G'ohm Probe, Doug Piper
  44. » [SI-LIST] Ethernet reciever Return loss measurement using spectrum analyzer, ixonte pornchai
  45. » [SI-LIST] Re: Ethernet reciever Return loss measurement using spe ctrum analyzer, Clewell, Craig
  46. » [SI-LIST] SDRAM Timing Help, Perrow, Shane
  47. » [SI-LIST] Recall: SDRAM Timing Help, Perrow, Shane
  48. » [SI-LIST] masking of PCB from x-rays, RameshK Cozerv IN HO
  49. » [SI-LIST] Re: SDRAM Timing Help, Jory McKinley
  50. » [SI-LIST] Leakage current in ASIC, Arun Kumar P N
  51. » [SI-LIST] Reg: Default state of FPGA GPIOs at power on, Marimuthu P.
  52. » [SI-LIST] Apple-Ipod, vikas
  53. » [SI-LIST] SI post processing tool upgrade, Ke Wang
  54. » [SI-LIST] test, noname
  55. » [SI-LIST] Result using NEC2++, Kim Jeong Su
  56. » [SI-LIST] Need technical ammunition for switching to single ground plane !, Gilles Aminot
  57. » [SI-LIST] Re: CIE-SF 2007 Annual Short Course Fall Sessions Sponsored by CIE-SF EPMC and SJSU, Jin Zhao
  58. » [SI-LIST] Re: Need technical ammunition for switching to single ground plane !, Lee Ritchey
  59. » [SI-LIST] High speed signal-return path, Raja Anand
  60. » [SI-LIST] Re: High speed signal-return path, olaney
  61. » [SI-LIST] Re: Need technical ammunition for switching to singleground plane !, Lee Ritchey
  62. » [SI-LIST] Pspice 6.0 can't find it's security dongle, PSRumbaugh
  63. » [SI-LIST] AC Coupled Signals, npatel
  64. » [SI-LIST] Re: AC Coupled Signals, Lee Ritchey
  65. » [SI-LIST] Silicon Motion SM502 and SM501 - any experience?, Dimiter Popoff
  66. » [SI-LIST] Si/EMC troubleshooting event at UCSB, Doug Smith
  67. » [SI-LIST] ddr2 75ohms option, Canes Venatici
  68. » [SI-LIST] Re: {==Junk_Mail==} ddr2 75ohms option, Cortex Y.C. Chen
  69. » [SI-LIST] Recommendations for good books, Hill, John
  70. » [SI-LIST] Re: Recommendations for good books, lifeatthesharpend
  71. » [SI-LIST] Memtest86 rev. 1.7, John Lin
  72. » [SI-LIST] Comments on fluorescent light noise, Mike Williams
  73. » [SI-LIST] What to do with "isolation" conductors in ribbon cable?, Loyer, Jeff
  74. » [SI-LIST] Lee Ritchey class in Copenhagen, Denmark on Dec 10-12, Axcon/Rolf V. Ostergaard
  75. » [SI-LIST] IEEE EMC talk Oct 9 in Santa Clara, Eric Bogatin
  76. » [SI-LIST] TLineSim.com - A new web-based transmission line simulation tool, tclupper