Posts for si-list, 05-2012

  1. Home
  2. si-list
  3. Archive
  4. 05-2012

Browse: Last Month: 04-2012    Main Archive Page    Next Month: 06-2012

By Date / By Date Reverse / By Threads

  1. » [SI-LIST] Senior Signal Integrity Engineer - Juniper Networks - Sunnyvale, CA, juniper
  2. » [SI-LIST] Re: Rise / Fall time, Zack B
  3. » [SI-LIST] TDR questions, Joel Brown
  4. » [SI-LIST] Static / Dynamic Overshoots, Vivek
  5. » [SI-LIST] inappropriate posting, Ray Anderson
  6. » [SI-LIST] 答复: Re: DDR2 termination Questions, liu . yaoping
  7. » [SI-LIST] R&D Engineer position at ANSYS, Werner Thiel
  8. » [SI-LIST] PCB Cross-Section Analysis, sourabh sthapak
  9. » [SI-LIST] European IBIS Summit Meeting Agenda - May 16, 2012, Bob Ross
  10. » [SI-LIST] DDR3 1600 slew rate, jing wu
  11. » [SI-LIST] Sr. Signal Integrity Electrical Engineer, Bret Adair
  12. » [SI-LIST] 5/8 IEEE EMC Santa Clara Valley Chapter: Guest Speaker Henry Ott, Eriko Yamato
  13. » [SI-LIST] XAUI - How to understand the "Compliance interconnect definition", Edison Green
  14. » [SI-LIST] SerDes - Layout Guidelines & Placement Consideration in PCB, Jayasuryan KG
  15. » [SI-LIST] intra-pair skew and jitter, Jim Nadolny
  16. » [SI-LIST] IBIS Summit at DAC 2012 - Third Call for Participation and Presentations, Mirmak, Michael
  17. » [SI-LIST] PI simulation "unrecoverable and unidentifiable" error with Hyperlinx 8.2, Manojkumar Chidambaram - ERS, HCL Tech
  18. » [SI-LIST] rambus paper - windowing for convolution sim, agathon
  19. » [SI-LIST] Re: OT: Mobile apps for engineers, Ken Wyatt
  20. » [SI-LIST] how to enable VCC voltage levels in Bus switch model, venkataraos
  21. » [SI-LIST] si-list subscriber stats, Ray Anderson
  22. » [SI-LIST] Calibration VNA question, Singh, Navroop
  23. » [SI-LIST] High Quality PCB manufacturer, Saeed Abedini
  24. » [SI-LIST] LVDS DDR or CMOS SDR interface, Aleksandrs Maklakovs
  25. » [SI-LIST] Just updated links to my recent EMC articles, Ken Wyatt
  26. » [SI-LIST] Need help understanding Stateye analysis, Joel Brown
  27. » [SI-LIST] EMI/EMC On-Site Seminar Recommendations, Zelno, John
  28. » [SI-LIST] HyperLynx DRC, Jack Olson
  29. » [SI-LIST] DC Resistance calculation in 2.5D solver, Tesla
  30. » [SI-LIST] clock 2nd harmonic, Joel Brown
  31. » [SI-LIST] Re: clock 2nd harmonic, ssabir@xxxxxxxxx
  32. » [SI-LIST] Temperature effects on backplanes?, Bond, David
  33. » [SI-LIST] Re: Temperature effects on backplanes?, Dudi Tash
  34. » [SI-LIST] DDR3 HSPICE Simulation, Dan
  35. » [SI-LIST] webinars on signal propagation in interconnects, Yuriy Shlepnev
  36. » [SI-LIST] Test//n, Rui Li
  37. » [SI-LIST] HDMI Frequency Failing RE Test by 7dB!!!!, vinod ah
  38. » [SI-LIST] Damaging electronic components from several meters distant!, Doug Smith
  39. » [SI-LIST] IBIS Summit at DAC 2012 - Fourth Call for Participation and Presentations, Mirmak, Michael
  40. » [SI-LIST] Re: HDMI Frequency Failing RE Test by 7dB!!!!, Sen Velmurugan
  41. » [SI-LIST] Guard Traces - Use 'Em, or Not?, Ken Wyatt
  42. » [SI-LIST] Power Integrity AC Analysis, bala
  43. » [SI-LIST] Re: Power Integrity AC Analysis, Dudi Tash
  44. » [SI-LIST] fwd:, ricky ng
  45. » [SI-LIST] hi, Sherman Yu
  46. » [SI-LIST] EMC Newsletter Delivered - Spring 2012, Ken Wyatt
  47. » [SI-LIST] Job opening at Marvell - SerDes PHY validation engineer, T.K. Jeon
  48. » [SI-LIST] Need feedback on s-parameter tutorial for IEEE EMC Global EMC and SI University, colin_warwick
  49. » [SI-LIST] Electrical Length?, Aaditya Kandibanda
  50. » [SI-LIST] De-rating, Siddharth Rajagopalan
  51. » [SI-LIST] Re: Need feedback on s-parameter tutorial for IEEE EMC Global EMC and SI University, colin_warwick
  52. » [SI-LIST] Agenda, IBIS Summit at DAC - June 5, 2012, Mirmak, Michael
  53. » [SI-LIST] Troubleshooting Kit (Part 1) Published, Ken Wyatt