Posts for si-list, 01-2010

Browse: Last Month: 12-2009    Main Archive Page    Next Month: 02-2010

By Date / By Date Reverse / By Threads

  1. » [SI-LIST] Free NVIDIA/Agilent joint webcast, live Jan 21st: "Astonishing Enhancements to Signal Integrity EDA Tools Using 3D Vision and GPUs", colin_warwick
  2. » [SI-LIST] Question about diff-probes, Zaiyi Liao
  3. » [SI-LIST] Re: Question about diff-probes, olaney@xxxxxxxx
  4. » [SI-LIST] DesignCon2010 Chiphead Video Contest Entry - Let's have some fun, Cosmin Iorga
  5. » [SI-LIST] circuit board resonance, Doug Smith
  6. » [SI-LIST] Crosstalk ( forward ), Praveen Gowda
  7. » [SI-LIST] Gigabit Ethernet POE Magnetics, Sabir
  8. » [SI-LIST] Timing analysis, pratap simha
  9. » [SI-LIST] IBIS Summit at DesignCon 2010: Third Call for Participation and Presentations, lwang
  10. » [SI-LIST] Differential Impedance TDR: How to get Z(t) from V(t), See Hour
  11. » [SI-LIST] PCIe routing, bernd schuster
  12. » [SI-LIST] Re: IPC-2152 trace current/temperature calculator, dbrooks9
  13. » [SI-LIST] [SI-LIST]Re: IPC-2152 trace current/temperature calculator, Arjun Bingipur
  14. » [SI-LIST] BGA Breakout., Surita Chandani
  15. » [SI-LIST] How to improve non monotonic, Lockard, Nickolaus J.
  16. » [SI-LIST] Re: BGA Breakout., Surita Chandani
  17. » [SI-LIST] mEEt and gEEk at DesignCon 2010, Jim Nadolny
  18. » [SI-LIST] Inexpensive SI software, Dave Pollum
  19. » [SI-LIST] 转发: Welcome to list 'si-list', rongsheng_yuan
  20. » [SI-LIST] Two webinar recordings for free viewing, Eric Bogatin
  21. » [SI-LIST] Registration and Call for Papers for Hardware Rocks Conference, Timothy Coyle
  22. » [SI-LIST] DesignCon early registration offer extended for SI-LIST readers, Barry Sullivan
  23. » [SI-LIST] Re: 2D vs 3D EM based signal integrity simulators, Hany Fahmy
  24. » [SI-LIST] Re: Inexpensive SI software, alex
  25. » [SI-LIST] IBIS simulation, sarvotham shetty
  26. » [SI-LIST] Signal Propagation On Interconnects (SPI 2010), "André M. Grabinski"
  27. » [SI-LIST] Re: mEEt and gEEk at DesignCon 2010, Jim Nadolny
  28. » [SI-LIST] IBIS Summit at DesignCon 2010: Fourth Call for Participation and Presentations, Lance Wang
  29. » [SI-LIST] Signal Integrity opening at LSI, Bangalore, Sanjeev Gupta
  30. » [SI-LIST] DSP core and I/O power pane coupling, jean-pierre bouthemy
  31. » [SI-LIST] Re: BGA Breakout, Jack Olson
  32. » [SI-LIST] EMI coupling of clock on other signals, chundi srikanth
  33. » [SI-LIST] Re: [Possible SPAM] BGA Breakout., Marc Humphreys
  34. » [SI-LIST] message problem, jyuhnjyh
  35. » [SI-LIST] Re: [Possible SPAM] EMI coupling of clock on other signals, Marc Humphreys
  36. » [SI-LIST] 1k ohm, 1 inch from uni-directional receiver, Loyer, Jeff
  37. » [SI-LIST] FB-DIMM Serial Channel., Surita Chandani
  38. » [SI-LIST] Re: Welcome to list 'si-list', tanglangshan
  39. » [SI-LIST] Re: Kramers-Kronig in Pictures, colin_warwick
  40. » [SI-LIST] Level Shifter, sunil bharadwaz
  41. » [SI-LIST] model to measurement correlation - (taken from Re: 2D vs 3D EM based signal integrity simulators), Grossman, Brett
  42. » [SI-LIST] USB Receptacle Shield Connection, Steve Barton
  43. » [SI-LIST] Chip-Package-System Workshop at DesignCon, Bhavana Thudi
  44. » [SI-LIST] DDR3 Slew Rate derating., Surita Chandani
  45. » [SI-LIST] Re: Level Shifter, DrFWS
  46. » [SI-LIST] get your 10 minutes of Fame at DesignCon, Eric Bogatin
  47. » [SI-LIST] SI Guide/Books for Beginner., Paliwal, Anand Export License Required - US UTCFS
  48. » [SI-LIST] Agenda, IBIS Summit at DesignCon for February 4, 2010, Bob Ross
  49. » [SI-LIST] PDS/power integrity books for the beginners, Mashook Ahamed Usman
  50. » [SI-LIST] Webinar - Multi-Gigabit Design with Xilinx IBIS-AMI Models, Todd Westerhoff
  51. » [SI-LIST] Re: Speeding Edge Exhibit, Lee Ritchey
  52. » [SI-LIST] Silver ink usage in High Speed Flex Designs, Rama Mohan Reddy Boreddy
  53. » [SI-LIST] Free Agilent hands-on workshop "Signal Integrity Design Using Channel Simulation and EM Co-design" in five US cities, colin_warwick
  54. » [SI-LIST] Re: SATA intra pair flipping, Marc Humphreys
  55. » [SI-LIST] Fw: Re: SATA intra pair flipping, Joseph . Schachner
  56. » [SI-LIST] Mentor/Xilinx channel analysis/IBIS-AMI webinar now posted online, Carrier, Patrick
  57. » [SI-LIST] 90ohm vs 100ohm differential line impedance, Hassan O . Ali
  58. » [SI-LIST] Query about Oscillator problem, chundi srikanth
  59. » [SI-LIST] The necessity of Pull-up resistors in DDR2, Hirshtal Itzhak
  60. » [SI-LIST] Re: The necessity of Pull-up resistors in DDR2, Hany Fahmy
  61. » [SI-LIST] DDR2 to Virtex 5 heating up and a few other questions, charlene radtke
  62. » [SI-LIST] Re: DDR2 to Virtex 5 heating up and a few other questions, Hany Fahmy