[visionegg] Re: visionegg for fMRI experiments


On Tue, 26 Nov 2002, Christoph Lehmann wrote:
> Thanks for your help. Concerning the parallel port: We built a
> TTL-streching circuit (flip flop) which enlarges the with of the TTL
> pulse to e.g. 50ms. Is it that what you mean with the potential problem:
> that TTL per se are too short to get recognized by the parallel port?
> So, do you think a low to high and back to low step, lasting for 50ms
> would be enough for your parallel port code?

I also need to trigger stimuli from TTL sent by a MRI scanner (on my
system, the pulse lasts 5 msecs though).

To check the latency on my linux system, I used latencytest
(http://www.gardena.net/benno/linux/audio/).

On a Dell Cpx 650Mhz PentiumIII notebook with an ATI Rage Pro..., 
the worst latency was... about 200ms! (on a 2.2.16 kernel, not patched
with the low latency patch).

The latencytest puts a lots of stress on the system, so in a real
situation the worst case may not happen frequently.

Also the situation may be better with more modern hardware,
but I advise you to try latencytest, and apply the lowlatency patches to
your kernel if necessary.

Another point:
The timing of a MRI scanner is perfectly stable, many experiments just
need to synchronize with the very first pulse of a sequence. This may
simplify the programmation a lot...


Christophe Pallier
www.pallier.org
www.unicog.org


======================================
The Vision Egg mailing list
Archives: http://www.freelists.org/archives/visionegg
Website: http://www.visionegg.org/mailinglist.html

Other related posts: