[visionegg] parallel port 2nd

From: Christoph Lehmann <lehmann@xxxxxxxxxxxx>
To: visionegg@xxxxxxxxxxxxx
Date: Tue, 17 Dec 2002 15:37:04 +0100

with the snippet
        # poll the LPT for the TTL trigger, sent by the MR scanner
        input_value = 0
        while (input_value == 0):
            my_debug_msg.append('before<' + str(input_value))
            input_value = raw_lpt_module.inp(0x379) 
            my_debug_msg.append('after<' + str(input_value))

I get 

before<0>
after<255>

so as far as I remember 255 equals ? 
how to interpret this stuff 

and still: how to link the input to bit4?

thanks
christoph

-- 
Christoph Lehmann 
Department of Psychiatric Neurophysiology 
University Hospital of Clinical Psychiatry 
Waldau 
CH-3000 Bern 60 
Switzerland 

Phone:  ++41 31 930 93 83 
Fax:    ++41 31 930 96 61 
Email:  lehmann@xxxxxxxxxxxx 
Web:    

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