[SI-LIST] Re: uStrip question
- From: "bdempsey85" <bdempsey85@xxxxxxxxxxx>
- To: "'Scott McMorrow'" <scott@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 9 Mar 2004 10:06:20 -0600
I'm off to do that in just a few minutes. Some quick lab work last
night was showing that our end-launched designs are working..
The TDR analysis will hopefully show that the design-to-impedance
numbers are right on.
Bill
-----Original Message-----
From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
Sent: Tuesday, March 09, 2004 8:22 AM
To: bdempsey85@xxxxxxxxxxx
Subject: Re: [SI-LIST] Re: uStrip question
Bill
Have you done a TDR of the traces to see what your impedance is, and if
there are any launch anomolies off the SMA's/
scott
Bill Dempsey wrote:
Tom,
We have a set of rt angle calibration connectors that we use to cal out
the
coax + connector effect. These same "style" connectors (diff vendor)
are
used as the souce/load connection point to the PCB. They are of course
soldered to the PCB -- that is to say they are not pressed or held in
place.
Did I answer your question?
One item of note -- the Smith chart is showing a mostly inductive tline.
As part of this evaluation I built 3 tlines per board: one
straight-thru,
one with five 0402 custom sized packages with the terminals shorted, and
one
with five 0603 packages...
Interestingly the the tline with the 0603 pads (additional capacitance)
has
much better performance (about 2.3dB loss vs. 6.5dB).
Bill
----- Original Message -----
From: "Tom Dagostino" <mailto:tom@xxxxxxxxxxxxx> <tom@xxxxxxxxxxxxx>
To: <mailto:bdempsey85@xxxxxxxxxxx> <bdempsey85@xxxxxxxxxxx>;
<mailto:si-list@xxxxxxxxxxxxx> <si-list@xxxxxxxxxxxxx>
Sent: Monday, March 08, 2004 10:26 PM
Subject: [SI-LIST] Re: uStrip question - repost
What you did not mention in your note may be the problem you are
having..
How did you connect your VNA to the test articles? How clean was the
launch? It is easy to get large reflections from poorly designed
launches
that will affect S21
Tom Dagostino
Teraspeed Consulting Group LLC
Device Modeling Division
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@xxxxxxxxxxxxx <mailto:tom@xxxxxxxxxxxxx> <mailto:tom@xxxxxxxxxxxxx>
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
http://www.teraspeed.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Bill Dempsey
Sent: Monday, March 08, 2004 7:57 PM
To: bdempsey85@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] uStrip question - repost
--sorry for the repost but the server is adding junk to the message that
made it unclear to read --
I recently built 3 different uStrip construction testboards and was
surprised by the results: it didn't work!
I built two boards as trace over copper with soldermask and one board
as a co-planar waveguide. I constructed the geometries of the boards by
following the results of some "freebie" tools out there.
After the boards were built I connected them to an HP network analyzer
(I calibrated out the cables/cons) to look at S21 response. What I
found was surprising. The S21 was extremely poor: approx 6.5dB loss
over 4". This just does not compare to the results of the tools I have
access to. I expected about 1.2 - 1.5 dB of loss at this frequency.
Has anyone else out there had some bad experiences with uStrip @
2.5GHz? What tools are you using? How are you correlating your
tool's results to real-world?
The construction of the three boards was as follows:
Board 1: 12 mil trace, 1/2 oz foil with 1 oz plating, 8 mil to gnd
(three
sheets of 1080 prepreg), 1oz copper gnd
Board 2: (CPW): 8 mil trace, 8 mils to gnd (again, 3 sheets of 1080
prepreg), 6 mil to gnd return on signal layer, same plating/thicknesses
Board 3: 4.75 mil trace, ~2.83 mils to gnd (one sheet of 1080 prepreg),
1/2 oz foil, 1oz plating, 1oz copper gnd
Regards,
Bill
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--
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
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