[SI-LIST] Re: thermal relief

My thoughts would be:

Since you now have mini stubs going from the via [for thermal releifed =
pads]
to the reference plane you will be decreasing the skin-area for the =
current
return path at high frequencies - hence the impedance will go up at =
higher
frequencies.  Ie the little stubs will act like series inductors.  =
You'll
probably have to do some calculations using an inductance model to find =
out
how serious this is.

My advice:  Don't use thermal relief on vias for the following reasons:

1)      You add unnecessary inductance
2)      You're more likely to have isolations/islands on power planes since
the thermal pads are easily cut-off from the power planes.

Gareth.

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of jan gillis
Sent: Wednesday, April 28, 2004 4:09 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] thermal relief


Hi all,

I am designing a four-layer microwave synthesizer. The second layer is=20
defined as a ground plane. For soldering purposes, it would be preferred =
to=20
make use of thermal reliefs for the ground vias. But I wonder what would =
be=20
the influence of the pin-to-ground plane impedance. Can anyone provide =
some=20
guideline for this purpose?

Thanks!

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