[SI-LIST] Re: spice-impedance profile of pdn

Hello Ray

DC resistance is a bias resistance to ground (there is a reference in Xilinx 
application note title: "Power Distribution System (PDS) Design:
Using Bypass/Decoupling Capacitors")

Actually I am trying to simulate schematic from a paper
and my results (impedance profile) are not matching or something similar to 
what is published.

regards
Nazish





--- On Fri, 5/22/09, Ray Anderson <ray.anderson@xxxxxxxxxx> wrote:

> From: Ray Anderson <ray.anderson@xxxxxxxxxx>
> Subject: [SI-LIST] Re: spice-impedance profile of pdn
> To: "nazish irfan" <irfannazish@xxxxxxxxx>, si-list@xxxxxxxxxxxxx
> Cc: "Ray Anderson" <raya@xxxxxxxxxx>
> Date: Friday, May 22, 2009, 2:38 PM
> 
> In your step 3, what value of DC resistance are you placing
> from the
> input of the PDN to GND? And why?
> 
> You DC resistance may be swamping the PDN impedance.
> 
> What doesn't seem to make sense?
> 
> 
> -Ray Anderson
> Xilinx Inc.
> 
> 
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> > On Behalf Of nazish irfan
> > Sent: Friday, May 22, 2009 2:28 PM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Re: spice-impedance profile of pdn
> > 
> > 
> > Hi All
> > 
> > I am trying to simulate in LT Spice  to get
> impedance profile of power
> > distribution network.
> > 
> > steps I am following are:
> > 
> > 1: make a netlist of all cap, ind and resistors
> > 
> > 2: connecting a 1A AC current source at node 1 (input)
> so as to make
> V=Z
> > 
> > 3: connecting a dc path resistance from node 1 to
> ground
> > 
> > 4: then do AC analysis and use .NET to get Z
> (impedance) at node 1
> > 
> > results I am getting does not seems to make sense
> > 
> > Can anybody suggest me something or do anybody has
> done this before
> and
> > can give me sample netlist to get an idea.
> > 
> > regards
> > Nazish
> > 
> > 
> > 
> > 
> > 
> > 
> >
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