[SI-LIST] Re: si-list Digest V3 #194
- From: "Sainath Nimmagadda" <gigabit@xxxxxxxxxx>
- To: <andrew.c.byers@xxxxxxxxxxxxxx>
- Date: Sat, 19 Jul 2003 21:39:33 -0800
Andy,
I disagree with your correction(about integrating magnetic flux lines).
Please do a simple dimensional check.
Yes, there is this correct inductance value which we get in the limiting
case when we capture all the flux. This is also the maximum inductance.
Lower inductance values are possible depending on the chosen surface and
the minimum can go as low as zero, like you said. So, there is a
distribution ranging from zero to the correct value. I believe the
significance of this and its SI application opens up new directions...
For SI application involving return current paths, I wonder how the idea
of minimum(zero) inductance path stuck around so long.
Sainath
---------Included Message----------
>Date: Fri, 18 Jul 2003 17:29:15 -0700
>From: <andrew.c.byers@xxxxxxxxxxxxxx>
>Reply-To: <andrew.c.byers@xxxxxxxxxxxxxx>
>To: <gigabit@xxxxxxxxxx>
>Cc: <si-list@xxxxxxxxxxxxx>
>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>
>Sainath,
>
>First of all, with your surface, either above the microstrip or below,
you
>are capturing magnetic field lines, not "flux lines". You integrate
these
>field lines over the area of the surface to produce a scalar number
which is
>your magnetic flux. A lot of times people get Flux and Field confused.
Flux
>is a scalar number, while field is a vector.
>
>So, like you say, if you capture all the field lines on your surface,
you
>should calculate the true flux and therefore the correct inductance.
Calling
>it a "maximum" or "minimum" does not really fit here. If you were to
use a
>surface where you did not account for all the field lines, the
inductance
>you calculate would indeed be smaller than the correct value. But it
would
>be wrong. I guess you could say that "maximum" inductance calculation
is
>correct, and "minimum" inductance calculation would be zero (you
capture
>none of the field lines).
>
>Any 2D cross section of an interconnect system should have one correct
>inductance value. As you move along in the 3D direction of propagation,
the
>2D cross sections will change and your inductance at that point might
change
>too. Once again this is assuming no internal inductance and a single
mode.
>With internal inductance, your total inductance becomes frequency
dependent.
>The Ramo, Whinnery, Van Duzer book points this out as well.
>
>Andy
>
>-----Original Message-----
>From: Sainath Nimmagadda [mailto:gigabit@xxxxxxxxxx]
>Sent: Friday, July 18, 2003 6:07 PM
>To: Byers, Andrew C
>Cc: si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>
>
>Andy,
>
>Yes, the inductance value should remain the same for both cases. Also,
>we are capturing all the magnetic flux lines in both cases.
>
>Now comes the real question. When you capture all the flux lines, is
the
>inductance going to be maximum? or minimum?
>
>Sainath
>
>---------Included Message----------
>>Date: Fri, 18 Jul 2003 09:50:57 -0700
>>From: <andrew.c.byers@xxxxxxxxxxxxxx>
>>Reply-To: <andrew.c.byers@xxxxxxxxxxxxxx>
>>To: <gigabit@xxxxxxxxxx>
>>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>>
>>Sainath -
>>
>>With the case of the surface above the microstrip, the inductance
>value
>>should remain the same. The integrating distance will be from the top
>of the
>>microstrip to infinity, and the B-field will be diminishing in
>magnitude as
>>you get further and further from the microstrip. The integral to
>infinity
>>will be equivalent to some series, and can be solved easily to a
>finite
>>number.
>>
>>Another way of looking at it - all of the fields that wrap under the
>>microstrip will also wrap above it. You just have to have a big
enough
>>surface to catch them all. In practice, a surface that is about 3-4
>times
>>the height of the dielectric should catch most of the fields. This
>whole
>>infinite surface stuff is just for theoretical robustness.
>>
>>By the way, there is a paper that demonstrates this in FDTD
simulation.
>I
>>believe it is in the 1997 EPEP conference - its written by Melinda
>Piket-May
>>and Roger Gravrok. I might be off by a year of two... if you have
>those
>>conference proceedings look for it. I can dig more for the name if you
>would
>>like.
>>
>>andy
>>
>>-----Original Message-----
>>From: Sainath Nimmagadda [mailto:gigabit@xxxxxxxxxx]
>>Sent: Thursday, July 17, 2003 11:44 PM
>>To: Byers, Andrew C
>>Cc: si-list@xxxxxxxxxxxxx
>>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>>
>>
>>Hi Andy,
>>
>>Thanks again. I get the themes that inductance is a one number affair
>>and current returns through the least inductance path. Is there a
>>contradiction in these themes?
>>
>>Let me borrow the following from your previous mail.
>>
>>"If you were to put your integrating surface on the other side of the
>>trace, extending up from the top of the trace, you theoretically would
>
>>have to make the area of the surface extend to infinity to "catch" all
>
>>the field lines."
>>
>>For this case, is the inductance of the microstrip going to be
>>infinity(because of infinite surface)? or any other value? remains
same
>
>>as what it was for the integrating surface below the trace?
>>
>>Sainath
>>
>>
>>
>>
>>---------Included Message----------
>>>Date: Thu, 17 Jul 2003 17:37:12 -0700
>>>From: <andrew.c.byers@xxxxxxxxxxxxxx>
>>>Reply-To: <andrew.c.byers@xxxxxxxxxxxxxx>
>>>To: <gigabit@xxxxxxxxxx>
>>>Cc: <si-list@xxxxxxxxxxxxx>
>>>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>>>
>>>Hello Sainath,
>>>
>>>Clearing up some terminology here.
>>>
>>>"Least inductance" refers to the path that the current will travel
>>because
>>>it has the least inductance of all possible paths in the system.
>>Current
>>>will never choose an alternate path of "most inductance". BUT you can
>
>>have a
>>>different design in which the "path of least inductance" is longer.
>>For
>>>example a two wire line with no ground plane where the wires are
>>extremely
>>>far apart. Huge loop, huge inductance. But still the smallest loop
for
>
>>that
>>>system. For a microstrip, a path of More Inductance would be if there
>
>>were a
>>>gap in the ground plane under the microstrip line. The current would
>>be
>>>forced to diverge around the gap. This path would be more inductive
>>than a
>>>solid ground plane, but the current would still be following the path
>
>>of
>>>least inductance for that particular case.
>>>
>>>The main challenge in most systems I've dealt with is making sure
>that
>>>return current paths have the least inductance possible. The simplest
>
>>way to
>>>do this is go differential. Then you carry your virtual ground with
>>you
>>>everywhere. If single ended, then be very conscious about where the
>>return
>>>currents flow and try to provide a short path. Plenty of threads on
>>this
>>>list about that.
>>>
>>>Not sure if this clears up your last question, hope it helps though.
>>>
>>>- Andy
>>>
>>>
>>>
>>>-----Original Message-----
>>>From: Sainath Nimmagadda [mailto:gigabit@xxxxxxxxxx]
>>>Sent: Thursday, July 17, 2003 4:01 PM
>>>To: Byers, Andrew C
>>>Cc: si-list@xxxxxxxxxxxxx
>>>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>>>
>>>
>>>Andy,
>>>
>>>Thanks. I appreciate the extra effort to explain detail of
>>integration.
>>>In short, you've explained the current loop formed by a signal path
on
>
>>
>>>trace and signal return path beneath the trace and on the ground
>plane.
>>
>>>Such a return path, with its minimum loop area, is widely known to
>>>provide the path of "least" inductance for high-frequency
currents(for
>
>>
>>>example, Black Magic book). If inductance is thought of as one
number,
>
>>
>>>what does "least inductance" refer to? Which is the path of "most"
>>>inductance for the microstrip? No doubt, I'm missing somethig.
>>>
>>>Sainath
>>>
>>>---------Included Message----------
>>>>Date: Thu, 17 Jul 2003 10:02:49 -0700
>>>>From: <andrew.c.byers@xxxxxxxxxxxxxx>
>>>>Reply-To: <andrew.c.byers@xxxxxxxxxxxxxx>
>>>>To: <gigabit@xxxxxxxxxx>, <beneken@xxxxxxxxxxxx>
>>>>Cc: <si-list@xxxxxxxxxxxxx>
>>>>Subject: RE: [SI-LIST] Re: si-list Digest V3 #194
>>>>
>>>>Sainath,
>>>>
>>>>As Thomas pointed out, inductance is the ratio of magnetic flux to
>>>current
>>>>in the conductor. Magnetic flux is the integral of B dot dA, or the
>>>magnetic
>>>>field [dot product] the surface you are integrating over. The "dot
>>>product"
>>>>is the same as multiplying the B-field by the area by the cosine of
>>>the
>>>>angle between the B-vector and the normal to the area. So if the
>>>B-vector is
>>>>perpendicular to the area surface, then the B-vector is parallel to
>>the
>>>unit
>>>>normal vector of the area surface, cosine of this zero degree angle
>is
>>
>>>1,
>>>>and you simply multiply B*area. Here's an example to illustrate.
>>>>
>>>>You have a rectangular metal trace over a ground plane, length in
>the
>>>>z-direction, height in the y, width in the x. Stretch a rectangle in
>
>>>the yz
>>>>plane between the trace and the ground plane. Make it any length
>>>(smaller if
>>>>you are simulating with EM tool). If we assume perfect conductors
(ie
>
>>
>>>no
>>>>internal-conductor magnetic fields
---------End of Included Message----------
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