[SI-LIST] Re: risetime effects of plane breaks

  • From: Ahmad Fallah <emcesd2000@xxxxxxxxx>
  • To: 'SI-List ' <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 11 Jan 2005 10:13:34 -0800 (PST)

Hi Chris,

 

There are a number of applications in which PCBs are of a 4-layer construction 
of Sig-GND-PWR-Sig stack up.  Both the top and bottom signal layers are routed 
u-strip.  Going from 4-layer to 6-layer design involves getting the VP of 
engineering approval.  The main reason for using 2,4, (6) layer PCBs, of 
course, is $.

Most often, these boards have number of different voltages that they have to 
distribute over various points on the board. The result is having multiple 
islands of power plane, and if you are not careful, a number of traces on the 
bottom layer will be routed over breaks in this inner PWR layer.  

 

The PCB designed for Off-highway (tractors, combines, aerial lifts, etc.) and 
automotive applications are mostly designed in a four-layer construction.  
These embedded control modules (such as sensors, engine control and 
transmission control modules, etc) must meet some very stringent EMC standards 
and requirements.  John Deere for example, where I was engaged in design and 
in-house EMC consulting activities for four years, has an emissions requirement 
that is 19.5 dB more stringent than the FCC class B and a 100 V/m radiated 
immunity requirement.  Requirements for ESD and other fast transients are also 
more stringent than those for commercial products.  These stringent 
requirements are put in place to ensure the safety of the vehicle/machine 
occupants, operators, and the pedestrians around it.  These requirements are 
put in place to avoid having a car, tractor, or combine move 
unexpectedly/uncontrollably while stopped at a railroad crossing, etc. These 
modules, if not design
 ed for
 EMC, usually fail the Radiated Immunity testing.  We have all heard about the 
EMC horror stories that are usually recited during the first sessions of most 
EMC classes. 

 

Also, most of these units either have a plastic enclosure, or have a metallic 
one that is not EMI sealed.  These enclosures are different than the ones we 
deal with in the telecom arena.  Just the gasket in one of the telecom chassis 
costs more than the whole enclosure for some of the applications I have listed 
here.

  

The amount of inner-layer capacitance is fairly low in four or six-layer PCBs.  
Perhaps, we can entertain some variation of layer stack in a six layer board 
that lends itself towards achieving a higher plane capacitance, but the reasons 
driving the application towards using the 6-layer stack up would hamper these 
effort. And the numbers of discrete caps put on a board are limited, and they 
are added for decoupling of the digital devices onboard.  These caps are not 
used to stitch together the various islands created in the PWR plane.  Unless 
this effect is understood and properly planned for, these bypassing caps are 
left out. 

 

Dr. Bruce Archambeault, has conducted a comprehensive study on this subject, 
which he has presentation during the 2003 EMC Symposium in Boston and, as a 
distinguished lecturer, at the Twin Cities (Minneapolis) IEEE-EMCS Chapter 
meeting.

  

One application I have worked on (and is in production today) involved: a 
4-layer PCB, 16-bit microcontroller (144-pin QFP), Flash memory (32-pin PLCC), 
EEPROM, glue logic, 5v-to-60v smps, high-gain amplifier and A/D section, I/O 
conditioning, and Power regulation.  The PCB was 3.75" x 5.5", and all of the 
active components had to be placed on the top side.  The box was metallic and 
open on one side, and the unit did meet the 100 V/m immunity requirements and 
the stringent emissions requirements.  

 

So, when my fellow HW or layout engineers ask me how many of the lines they can 
cross over a break in an image plane, I tell them to check their luck for that 
they. I have consulted on numerous projects that involved disobeying the rule 
"do not cross the cuts in the image planes". 

 

 

Regards,

 

Oscar Fallah

 

BTW: I would like to take this opportunity to remind everyone in the Santa 
Clara Valley and beyond of tonight's IEEE EMCS Chapter meeting.  Tonight's 
speaker is SI-List's regular contributor, Mr. Steve Weir.  Look forward to 
seeing you at Applied Material?s Café on Bowers Ave. at 5:30 tonight.
 
 
Chris Cheng <Chris.Cheng@xxxxxxxxxxxx> wrote:
Thanks Charles,
However, when you say it get worst, is it for the stripline case or
microstrip like Doug did ? In the later case, we seem to agree no one will
or should do it in real life. Are saying the EMI still get worst in
stripline case with a solid ground on one side ?

-----Original Message-----
From: Charles Grasso
To: cpad@xxxxxxxxx; SI-List
Sent: 1/10/2005 8:47 PM
Subject: [SI-LIST] Re: risetime effects of plane breaks

In another life I ran such a simulation based on a trace crossing
a split and looked at the radiated profile. The radiated profile
was *significantly* worse. I added a capacitor and found that
although most of the emissions dropped dramatically there was always
one resonance peak that was an absolute screamer. This resonance varied

with
the inductance seen by the signal due to the split and the capacitance
across the split.

Cross splits with caution.



On Mon, 10 Jan 2005 19:20:01 -0800, Chris Padilla 
wrote:

> I'd like to see the EMI implications (radiation) of crossing a split
in a
> plane. What is okay for SI may not be so for EMI....
>
> ----->Chris
>
> At 07:05 PM 1/10/2005 -0800, Chris Cheng wrote:
>> I see, but I will be more interested in real life application where 
>> there is
>> a stripline crossing a cut power plane with a solid ground on the
other
>> side. They exit in really world and I for one would like to know at
what
>> point it will degrade the performance to an unacceptable level. 300ps

>> edge ?
>> 100ps edge ? 20 mil gap ? 100 mil gap ? etc. My experience suggest
they 
>> can
>> work up to a reasonable speed (at least to the point where you start
>> thinking maybe differential signal makes more sense due to other
design
>> considerations).
>>
>> -----Original Message-----
>> From: steve weir [mailto:weirsp@xxxxxxxxxx]
>> Sent: Monday, January 10, 2005 6:56 PM
>> To: Chris.Cheng@xxxxxxxxxxxx; SI-List
>> Subject: Re: [SI-LIST] Re: risetime effects of plane breaks
>>
>>
>> Chris, because Zontar is listening.
>>
>> Doug set-up a nice physics experiment that nicely demonstrates the
bad
>> things that happen when crossing a split with no other solid plane in

>> the
>> vicinity. For my money, it aptly demonstrates several important
effects
>> and precisely why it would be a bad idea to put into practice.
>>
>> Various people from Lee to Dan, Arpad, and yourself have pointed-out

>> that
>> under appropriate circumstances crossing a cut is not automatically
the 
>> end
>> of the world. I don't think anyone proposes that crossing cuts like

>> Doug
>> has set-up comes without substantial consequences.
>>
>> Best Regards,
>>
>>
>> Steve.
>>
>> At 06:30 PM 1/10/2005 -0800, Chris Cheng wrote:
>> >Sorry but I have to ask, why would anyone will run a single edge 
>> signal at
>> >300ps as microstrip across a cut ground reference plane ? I can 
>> understand
>> >if it is a stripline with a solid ground on one reference and cut
power
>> >planes on the other (which I have do a lot, not by choice though).
What
>> >application will call for such routing ?
>> >
>> >-----Original Message-----
>> >From: steve weir [mailto:weirsp@xxxxxxxxxx]
>> >Sent: Monday, January 10, 2005 12:28 PM
>> >To: arpad.muranyi@xxxxxxxxx; SI-List
>> >Subject: [SI-LIST] Re: risetime effects of plane breaks
>> >
>> >
>> >Arpad, a jump from 10-14% coupling up to 30% or so is still very
>> >significant. Phase match and other common mode issues should not be
>> >dismissed when attempting to cross a split. The first choice should
be
>> >don't do it. But if one must, then do so with care.
>> >
>> >Regards,
>> >
>> >
>> >Steve.
>> >At 11:41 AM 1/10/2005 -0800, Muranyi, Arpad wrote:
>> > >Even though I was just speed reading this
>> > >thread, I didn't see this mentioned yet:
>> > >
>> > >You can also get by with plane breaks if the
>> > >traces going over it are closely coupled
>> > >differential pairs...
>> > >
>> > >Arpad
>> >
>>
>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3
D=3D
>> >=
>> > >=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=20
>> > >
>> > >-----Original Message-----
>> > >From: si-list-bounce@xxxxxxxxxxxxx 
>> [mailto:si-list-bounce@xxxxxxxxxxxxx]
>> =
>> > >On Behalf Of steve weir
>> > >Sent: Monday, January 10, 2005 11:21 AM
>> > >To: emcesd2000@xxxxxxxxx; SI-List
>> > >Subject: [SI-LIST] Re: risetime effects of plane breaks
>> > >
>> > >Oscar, yes, it is quite a dramatic effect isn't it? I suspect
that 
>> =
>> > >when=20
>> > >Lee says "it depends on how you do it" he has another contiguous 
>> plane, =
>> > >ie=20
>> > >ground underneath the split as opposed to a split on all planes as

>> in=20
>> > >Doug's experiment. Assuming lots of decoupling between each of
the =
>> > >islands=20
>> > >and the common ground plane the jump in coupling between lines 
>> would be
>> =
>> > >
>> > >greatly suppressed.
>> > >
>> > >Regards,
>> > >
>> > >
>> > >Steve.
>> > >
>> > >At 11:00 AM 1/10/2005 -0800, Ahmad Fallah wrote:
>> > > >Hi Steve,
>> > > >
>> > > >I have repeated Doug's experiment with a modified fixture where

>> an=20
>> > > >additional trace (victim) was added near (~1 cm) the "signal"
line
>> for=20
>> > > >X-talk measurements. I have measured a 10-fold increase in 
>> x-talk=20
>> > > >amplitude in going from Case 1 to Case 2.
>> > > >
>> > > >Case 1: the offending and victim lines are both drawn over a
solid 
>> =
>> > >return=20
>> > > >plane.
>> > > >Case 2: the offending and victim lines are both drawn over the
cut 
>> in =
>> > >the=20
>> > > >return plane
>> > > >
>> > > >Regards,
>> > > >
>> > > >Oscar
>> > > >
>> > > >
>> > > >
>> > > >steve weir wrote:
>> > > >
>> > > >Lee, the 5cm is the length of the break. The break is only about
=
>> > >20-50mils
>> > > >wide. Hit the link and scroll to Figure 3. In Doug's test
set-up, 
>> both
>> =
>> > >of
>> > > >the two planes have been broken. Now, If one cares to do a 
>> crosstalk =
>> > >test,
>> > > >it looks like Doug could modify his fixture rather easily to do

>> that. =
>> > >In
>> > > >the vicinity of the break, the multiple line coupling, including
=
>> > >between
>> > > >members of a diff pair jumps.
>> > > >
>> > > >
>> > > >
>> > > >
>> > > >
>> > > >If you want to perform an entertaining experiment, take a diff 
>> pair, or
>> > > >just one active driver and a quiet line and route them over a 
>> narrow, =
>> > >and
>> > > >short break, say 0.25" by 0.02" and take four port S parameter
>> > > >measurements. Take another pair and do likewise, but keep 
>> extending the
>> > > >length of the slot, ie perpendicular to the traces by a factor
of 
>> 2 =
>> > >with
>> > > >each test. Even though the width of the gap is short, by the
time 
>> that
>> > > >slot becomes an inch or two long the band of frequencies where 
>> coupling
>> =
>> > >is
>> > > >fairly strong will be pretty wide.
>> > > >
>> > > >http://emcesd.com/tt2005/tt010105.htm
>> > > >
>> > > >Regards,
>> > > >
>> > > >Steve
>> > > >
>> > > >
>> > > >At 04:30 PM 1/9/2005 -0800, Lee Ritchey wrote:
>> > > > >Just noticed that you call a 5 cm break relatively small. Does

>> that =
>> > >mean
>> > > > >5 cm in width?
>> > > > >
>> > > > >Lee W. Ritchey
>> > > > >Speeding Edge
>> > > > >P. O. Box 2194
>> > > > >Glen Ellen, CA 95442
>> > > > >Phone- 707-568-3983
>> > > > >FAX- 707-568-3504
>> > > > >
>> > > > >I just used the energy it took to be angry to write some
blues.
>> > > > >Count Basie
>> > > > >
>> > > > >
>> > > > > > [Original Message]
>> > > > > > From: Doug Smith
>> > > > > > To: SI-List
>> > > > > > Date: 1/8/2005 5:23:26 PM
>> > > > > > Subject: [SI-LIST] risetime effects of plane breaks
>> > > > > >
>> > > > > > I think most of us know not to route signals over plane 
>> breaks on
>> =
>> > >PWBs
>> > > > > > as all kinds of bad things can happen when this occurs in a
=
>> > >layout.
>> > > > > > But, how do you convince co-workers or your boss that a new

>> design
>> > > > > > needs to avoid doing this even if added expense or project

>> delay =
>> > >is
>> > > > > > required? Experimental data can be the key and this month
my =
>> > >Technical
>> > > > > > Tidbit shows what happens to signal risetime if the signal

>> crosses
>> =
>> > >a
>> > > > > > plane break.
>> > > > > >
>> > > > > > Crossing Ground Plane Breaks - Part 4
>> > > > > > Risetime Effects on Signals
>> > > > > >
>> > > > > > Abstract: Signals that cross ground plane breaks on printed

>> wiring
>> > > > > > boards (PWBs) experience degradation as well as cause EMI =
>> > >problems.
>> > > > > > Significant degradation of signal risetime is shown to
occur, 
>> even
>> > > > > > with a relatively small ground break of five cm at
risetimes 
>> on =
>> > >the
>> > > > > > order of 300 ps.
>> > > > > >
>> > > > > > The link to the article is the picture of the experimental

>> test =
>> > >setup
>> > > > > > at the bottom of the home page at http://emcesd.com .
>> > > > > >
>> > > > > > Doug
>> > > > > > --
>> > > > > > -------------------------------------------------------
>> > > > > > ___ _ Doug Smith
>> > > > > > \ / ) P.O. Box 1457
>> > > > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D Los Gatos, CA 95031-1457
>> > > > > > _ / \ / \ _ TEL/FAX: 408-356-4186/358-3799
>> > > > > > / /\ \ ] / /\ \ Mobile: 408-858-4528
>> > > > > > | q-----( ) | o | Email: doug@xxxxxxxxxx
>> > > > > > \ _ / ] \ _ / Website: http://www.dsmith.org
>> > > > > > -------------------------------------------------------
>> > > > > >
>> > > > > > 
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http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
http://www.si-list.org

List archives are viewable at: 
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:

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To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                //www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: