[SI-LIST] Re: return currents

Larry Smith wrote:

>>
Zhiping - Voltage is always with respect to (WRT) some other node.  All
voltages on printed circuit boards, electronic packages or chips are
differential.  Voltage is the potential of one node WRT another node.
We sometimes talk about the voltage of a node WRT the center of the
earth or WRT spice node zero (they are the same thing) but those
voltages are irrelevant for signal integrity in our products.  The only
thing that counts is the difference in voltage between two nodes, for
example a signal WRT local ground.=20
<<

I feel this is one of the central points of signal integrity.  The
problem is that it contradicts early training and experience in what
voltage is.  It's hard to give up on the comforting concept of an
absolute voltage reference and node voltages defined with respect to it.

It's unfortunate that SPICE simulations, particularly those using
partial inductance models, reinforce the idea of absolute voltages.  You
can easily see things that look like "ground bounce", where the ground
at one end of your physical structure is moving with respect to the
ground at the other end, but this is purely an artifact of the partial
inductance model, and will be different depending on how you define your
partial inductances.

This is why I recommend using loop inductance rather than partial
inductance.  Then node 0 in SPICE represents the local reference, rather
than some global reference.  All node voltages in the simulation are
therefore defined as voltage differences with respect to the local
reference, which is what is important from a signal integrity
perspective.  It's fairly straightforward to generate a loop inductance
model from a partial inductance one (Brian Young's book shows how for
the most common case). =20

My feeling these days is that partial inductances are a wonderful tool
to calculate inductance, but that they should never be used to generate
SPICE models directly.  I realize I'm on the fringe in that belief. :-)

--=20
Michael Tsuk
Compaq AlphaServer Platform Group
(508) 467-4621



-----Original Message-----
From: Larry Smith [mailto:ldsmith@xxxxxxxxxxxxxxxxxx]
Sent: Wednesday, September 26, 2001 4:55 PM
To: ldsmith@xxxxxxxxxxxxxxxxxx; zhiping@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; james.f.peterson@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: return currents



Zhiping - Voltage is always with respect to (WRT) some other node.  All
voltages on printed circuit boards, electronic packages or chips are
differential.  Voltage is the potential of one node WRT another node.
We sometimes talk about the voltage of a node WRT the center of the
earth or WRT spice node zero (they are the same thing) but those
voltages are irrelevant for signal integrity in our products.  The only
thing that counts is the difference in voltage between two nodes, for
example a signal WRT local ground.  For traces in a PCB, the difference
voltage is always vertical, the voltage of a trace WRT the local
reference plane.  TEM mode analysis is good for all the stuff we do.

The PCB stackup in question has ground planes that surround both the
analog and digital traces.  The only thing that is important is the
differential voltage between the trace and reference (ground) planes.
That difference voltage will propagate down the trace (transmission
line).  Eventually, the voltage/current waveform will arrive at a via
that takes it to the surface of the PCB.  There should always be a
nearby reference (ground) via.  A chip will sense the differential
voltage between the signal and local ground.  This will be the same
voltage that was driven into the trace at the other end of the line,
if we have done a good job of maintaining a controlled impedance
environment (50 ohms) for the whole length of the trace. The voltage
that went in on one end is the same as the voltage that comes out on
the other end a time delay later, each WRT to their local grounds.
(For the moment, let's ignore the lossy nature of transmission lines.)

Now suppose we had a way to measure the voltage between two ground
points spaced several inches apart horizontally (I am not sure how to
do it, but let's say we could).  Suppose there were several volts
difference between the two local ground points.  Would that make any
difference to the waveform propagating on the 50 Ohm transmission
line?  I don't think so.  What ever voltage went into the transmission
line WRT it's local ground will come out of the transmission line WRT
local ground, even if the local grounds are several volts apart.  The
driving chip drives WRT local ground and the receiving chip receives
a signal WRT local ground.  If there happens to be a bunch noisy
digital lines on the opposite side of a ground plane, ...so what?

BTW, I agree with you that low frequency can be a killer.  But signals
behave well at high frequency.  The thickness of a ground plane is
all you need to isolate one signal from another.

regards,
Larry Smith
Sun Microsystems

> Date: Wed, 26 Sep 2001 12:27:38 -0700
> From: Zhiping Yang <zhiping@xxxxxxxxx>
> X-Accept-Language: en
> MIME-Version: 1.0
> To: ldsmith@xxxxxxxxxxxxxxxxxx
> CC: si-list@xxxxxxxxxxxxx, james.f.peterson@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] Re: return currents
>=20
> Larry,
>=20
> What you said about the current distribution at high
frequency(>100Mhz)
> is true, but my questions is whether the current distribution is
important
> or the voltage variation on the power plane is more important than
current
> distribution?
>=20
> Let's say, there are 2 points on the power plane and the most (>93%)
current
> flows
> on the surface near digital circuit. The current flow near analog
circuit is
> very small (<7%), but it has big loop (large inductance) and it
produces same
> voltage drop between those 2 points as large current on the surface of
digital
> circuit.
> IF the anolg circuit is sensitive to the voltage noise, then it is a
problem.
>=20
> Jim, another thing you need to be aware is that low frequency may be a
killer
> for your anolog circuit. In your current stack up, it is diffcult for
to
> control
> the lower frequency current return path on layer 4.
>=20
> Thanks.
>=20
> Zhiping
>=20
>=20
> --
>    Zhiping Yang, Ph. D.
>    Hardware Engineer
>    Cisco Systems
>    270 West Tasman Drive
>    Mail Stop:SJCG/2/2
>    San Jose, CA 95134             |          |
>    email: zhiping@xxxxxxxxx      :|:        :|:
>    Tel  : 408 525 5690          :|||:      :|||:
>    Fax  : 408 526 5504       .:|||||||:..:|||||||:.
> *****************************************************
>=20
> Larry Smith wrote:
>=20
> > Jim - I don't believe that the high frequency return currents on
your
> > digital traces will have much effect on your analog traces even
though
> > they share the same ground plane (layer 4).
> >
> > The skin depth at 100 MHz is about 0.26 mil compared with the 0.7
mil
> > thickness of half oz copper.  The skin depth is essentially the
depth
> > that the magnetic field penetrates into the copper.  At 100 MHz,
very
> > little magnetic field (approximately 1/[e^(.7/.26)] =3D 7% ) will
> > penetrate through the copper plane.  Even less of it will reach an
> > analog trace.  At higher frequencies, the penetration will be even
less.
> >
> > How sensitive are your analog signals?  For digital signals, I would
> > not worry about 7% magnetic field penetration.
> >
> > regards,
> > Larry Smith
> > Sun Microsystems.
> >
> > > Delivered-To: si-list@xxxxxxxxxxxxxx
> > > From: "Peterson, James F (FL51)" <james.f.peterson@xxxxxxxxxxxxx>
> > > To: si-list@xxxxxxxxxxxxx
> > > Subject: [SI-LIST] return currents
> > > Date: Wed, 26 Sep 2001 07:32:10 -0400
> > > MIME-Version: 1.0
> > > Content-Transfer-Encoding: 8bit
> > > X-archive-position: 946
> > > X-listar-version: Listar v1.0.0
> > > X-original-sender: james.f.peterson@xxxxxxxxxxxxx
> > > X-list: si-list
> > >
> > >
> > > hello,
> > >
> > > Stackup :
> > >
> > > 1 - gnd
> > > 2 - digital sig
> > > 3 - digital sig
> > > 4 - gnd
> > > 5 - analog sig
> > > 6 - analog sig
> > > 7 - gnd
> > > 8,9,10,11 .....
> > >
> > > notice that the digital signals from layer 3 and the analog
signals from
> > > layer 5 will probably have return currents on layer 4.
> > >
> > > question :
> > > will the digital return currents cause noise in the analog
section, since
> > > they both share layer 4 for return currents? (My first guess is
yes, but
> > > someone mentioned that the skin depth  for the return currents is
small so
> > > they can share layer 4 without effecting each other.)
> > >
> > > thanks for your input.
> > > Jim
> > > ------------------------------------------------------------------
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