[SI-LIST] Re: resend - Specctraquest model: mounted inductance

  • From: "Bart Bouma" <bart.bouma@xxxxxxxxx>
  • To: Larry Smith <Larry.Smith@xxxxxxx>
  • Date: Wed, 4 Jun 2003 12:48:29 +0200

Larry,
Thanks for your answer.
Yes, we are looking for mounting inductance of a decoupling capacitor for 
use in the SQPI tool.
As you know, models for this require inductance values for the part itself 
(intrinsic inductance) and inductance associated with mounting.
You wrote: " .. measure the loop inductance on an existing product or test 
board ...", I agree, this can be done quite well on a two terminal device 
(standard MLCC).
But how to measure this for a three terminal device, like an feedthru or a 
X2Y-capacitor?
Especially the latter: the X2Y consists of 3 embedded capacitors and forms 
actually 3 current loops.

Following describes how we think how to attach a three-terminal device, 
like the X2Y.
The ideal situation would be that both end-terminations - as a standard 
two terminal capacitor has - are attached to two powerplanes, e.g. as you 
mentioned Vdd and Vdd2. The third terminal, which actually consists of two 
side connections (internally connected to each other) must be connected to 
a ground plane in between with at least 2 via's. One at each side of the 
part..
Stackup: Vdd - Gnd - Vdd2 with equal distances between the planes.

There will be a power flow through the feedthru capacitor, which will 
result in some power loss due to its series resistance.
But not in case of the X2Y, which is attached in bypass (shunt).
In case of the X2Y, measurements have shown that a very low impedance over 
a broad frequency range can be reached, due too its low intrinsic ESL, and 
low ESR (as presented at CARTS2002 USA & Europe).
The intrinsic inductance of the part itself can be extracted very well by 
a VNA 2-port measurement (as described in some SUN-papers).
The part is mounted in a low inductance fixture, designed for 
three-terminal devices and is de-embedded by a TRL-calibration.

Now back to the mounting inductance:
almost needless to mention, but to fully employ the low inductance 
character of e.g. the X2Y, mounting should be paid attention too.
How to measure/determine/extract/estimate the mounting inductance for 
these three terminal devices.
Can I assume the mounting inductance to be half the value of a standard 
capacitor with the same size?
For from mounting point of view the two halves of e.g. the X2Y are 
paralleled. Or is this too simple?
Do you have any additional suggestion?

best regards,
Bart Bouma
www.yageo.com



Bart - Are you looking for the mounting inductance associated with a
decoupling capacitor to be used in the Spectra Quest Power Integrity
tool?  SQPI has a fast henry type of EM solver that will estimate the
loop inductance for the Vdd/Gnd terminals.  Or, you can do as we do and
measure the loop inductance on an existing product or test board and
insert the inductance manually.

I must confess, I don't really know what to do with 3 terminal
capacitors for the decoupling application.  Where do you attach the 3
terminals?  Two of the terminals will be Vdd and Gnd, but where does
the third terminal attach to the system?  The mounting inductance
for your 3 terminal device will be highly dependent on where the
current is flowing (current and return current).

Does power flow through the 3 terminal device?  For example, do you
hook it to Vdd, Gnd and Vdd2?  Is Vdd2 a separate power plane in the
PCB stackup?  A 3 terminal capacitor used in this way may be very
useful for a sensitive PLL or similar low power application.  But the
power consumer will be downstream of the relatively high series
impedance of the 3 terminal device.  It may be possible to meet a
target impedance of several ohms using the 3 terminal device, but it
will be very difficult to build a 1 mOhm power distribution system
up to the 100 MHz range using 3 terminal capacitors.

regards,
Larry Smith
Sun Microsystems

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> Subject: [SI-LIST] resend - Specctraquest model: mounted inductance
> From: "Bart Bouma" <bart.bouma@xxxxxxxxx>
> Date: Tue, 3 Jun 2003 08:34:54 +0200
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> 
> Hi all,
> I'm resending this post on Specctraquest mounted inductance. Until now 
no 
> reactions received on this topic.
> Is there no one on the si-list who can help a vendor to generate 
> Specctraquest models?
> I read so often that models are not available from vendors, now is your 
> chance!
> But I need some help. Please!
> 
> Bart
> www.yageo.com
> ================  original post ========================================
> 
> Hi all,
> 
> I am starting to develop Specctraquest models for three-terminal 
> capacitors, e.g. a feedthru capacitor.
> Does anybody know how to extract, or how to determine, the mounted 
> inductance of such a three-terminal capacitor?
> Maybe someone already did this?
> 
> For a two terminal device the loop-inductance can be determined quite 
> easily, but for a three terminal capacitor I could not find a single 
> reference.
> Of course it all depends on substrate thickness, vias and layout, but is 

> there a general method how to calculate the mounted inductance or 
> loop-inductance for such a device?
> Any information is welcome!
> 
> regards, 
> Bart Bouma
> www.yageo.com
> 
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