[SI-LIST] Re: reference plane

Jeff,

If the stripline has an equal distance from the power and ground planes, then
logically the measurements with respect to ground or power would be the same.
But your measurements also show that, a stripline between two ground planes
(i.e., the two planes are shorted at measurement ports) would give the same
results. Please correct me, if I misunderstood you.
Is this amount of AC decoupling achievable solely through the interplane
capacitance?

Regards,
Ege

"Loyer, Jeff W" schrieb:

> A few thoughts, extracted from my response to a similar question...
>
> The original question from last October:
> An internal signal layer in a multi-layer stackup is situated between ground
> and a power plane. If the power plane splits into two islands is the effect
> significant on the signal layer?  (Dielectric thickness between layers = 8
> mil.)
>
> My response:
> Assuming your planes are very wide, and since the space between the planes
> is kept small, there shouldn't be any significant effect to Z0 at these
> geometries.
>
> I had the opportunity to measure impedances of stripline traces which run
> between ground and power planes.  I found that the TDR was identical
> regardless of which plane I measured relative to.  After some investigation,
> I concluded that for the geometries involved (only 14mils between planes),
> the coupling between the planes was strong enough that, AC-wise, they were
> one and the same.
>
> The identical situation should hold true for your configuration, if your
> planes are wide enough to have strong coupling between them and ground, and
> the space between the 2 planes isn't wide enough to cause a discontinuity.
>
> In summary,
> If there is strong coupling between the ground and power planes, they are
> essentially the same for high-speed reference.  If they aren't strongly
> coupled, there will definitely be a difference between which is the
> reference.  People have used "stitching caps." (capacitors between the two
> planes at the location where the signal transitions from one reference to
> another) to remedy the problem, but I'm skeptical of the value of these.
> For the rise-times we're at today, I believe those caps. would have little
> real value (the parasitics would be too great).  I.E., a TDR done without
> the caps. populated would look the same as one done with the caps. in place.
>
> I believe the best approach is to either keep referenced to the same plane
> throughout the entire topology (and most chips reference signals to ground),
> or only transition between planes which are strongly coupled.
>
> My 2 cents.
>
> Jeff Loyer
>
> -----Original Message-----
> From: evillaf@xxxxxxxxx [mailto:evillaf@xxxxxxxxx]
> Sent: Thursday, June 20, 2002 10:36 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] reference plane
>
> Can anyone explain the advantages and disadvantages of
> using a power plane for a reference plane instead of a
> ground plane?  I have always used both as a DC reference
> in the past.  Now I am beginning to hear arguments that
> only GND planes should be used for critical signals.
> This becomes somewhat impractical for some boards.
>
> Thanks in advance.
> Ellis
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