[SI-LIST] Re: (probably naive) FPGA PDS questions
- From: Ray Anderson <reanderson@xxxxxxxxxxxxx>
- To: reanderson@xxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 28 Jun 2004 07:32:41 -0700
Upon re-reading my last message I realized that I should have added one
more statement relative to the anit-resonance phenomena. When I said
that the large hi-Z anti-resonance peaks seen in the ~100MHz region are
not seen at the die I should have qualified that with mention that that
is true if you have good on-package and/or on die decoupling in place.
-Ray
Ray Anderson wrote:
>The bright side is that if you look at the impedance profile at the Vdd/Vss
>nodes at the die, the anti-resonance peak is almost invisible (usually) as
>compared to looking at it at the package/pcb interface.
>
>
>
.
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- References:
- [SI-LIST] (probably naive) FPGA PDS questions
- From: Glenn Judd
- [SI-LIST] Re: (probably naive) FPGA PDS questions
- From: Ray Anderson
Other related posts:
- » [SI-LIST] (probably naive) FPGA PDS questions
- » [SI-LIST] Re: (probably naive) FPGA PDS questions
- » [SI-LIST] Re: (probably naive) FPGA PDS questions
- » [SI-LIST] Re: (probably naive) FPGA PDS questions
- [SI-LIST] (probably naive) FPGA PDS questions
- From: Glenn Judd
- [SI-LIST] Re: (probably naive) FPGA PDS questions
- From: Ray Anderson