Hi All, I have an IXIA packet generator/analyzer providing ethernet data streams to my switch. I am finding that the switch is receiving data at a rate that is slightly higher than the rate at which switch is transmitting data. I attribute this to some clock ppm variations in the switch. I have some questions related to the ppm variation in clocks: 1. If i have a clock of X MHz and if i feed this clock to a pll to get a clock of freq Y Mhz, will the ppm variation of the clocks X and Y remain the same? 2. When we state that there is a +100 ppm variation from X MHz in the clock, does this mean that the clock now is a constant frequency of (X MHz + 100ppm)? or does it dynamically vary between X MHz and (X MHz + 100ppm)? 3. Would signal integrities issues on the board affect ppm variations in clocks? 4. Is there any on-board correction methodologies that can be applied to adjust the ppm variations in clocks? Thanks, Anand ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu