[SI-LIST] Re: 答复: power planes (4-layer-board)

Anyone has given a though to reducing the PCB thickness from standard 0.063" to 
say 0.033" to reduce the separation between the power and the ground planes and 
thereby increase the capacitance between the them ?

If the board size is not too large this should work. If the board size is very 
large, it may have some warping ?

Vikas Shukla

http://referencedesigner.com


--- On Sun, 2/15/09, Zhangkun <zhang_kun@xxxxxxxxxx> wrote:

> From: Zhangkun <zhang_kun@xxxxxxxxxx>
> Subject: [SI-LIST] 答复: power planes (4-layer-board)
> To: "'Daniel Bauer'" <daniel.bauer16@xxxxxx>, si-list@xxxxxxxxxxxxx
> Date: Sunday, February 15, 2009, 6:50 PM
> Hi Daniel
> 
> I agree with the option of David's from the view of
> EMC.
> 
> 1)If the PCB is of 4-layered, the product would not be
> high-end product. There is no a lot of strict power request.
> The power trace would be enough.
> 
> 2)According to my experience, the power-ground plane pair
> in 4-layer PCB would be bad for EMC. We have done the
> contrast experiment. The RE difference is about 10db.
> 
> Hope this would be helpful
> 
> Best Regards
> 
> Zhangkun
> 2009.2.16
> 
> 
> 张坤
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> -----邮件原件-----
> 发件人: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx] 代表 Daniel Bauer
> 发送时间: 2009年2月14日 20:38
> 收件人: si-list@xxxxxxxxxxxxx
> 主题: [SI-LIST] power planes (4-layer-board)
> 
> Hi, 
> 
> the standard layout for an 4-layer PCB is, using outer
> layers for the signals and the two inner layers for one
> ground and one power plane. The power plane seems to have a
> few advantages as well as disadvantages (using an 4-layer
> board). 
> 
> If a trace running at the top layer has to change to the
> bottom layer - also the return current has to change the
> layer (using stitched capacitors). 
> 
> What do you think about the proposal to use the third layer
> for ground as well as for power? On every position where an
> signal trace is running at the bottom layer, the third layer
> will be a ground plane, connected to the ground plane on the
> second layer.... and when there`s no trace on the bottom
> layer I will use an power plane on the third layer.  From
> this it follows that I will get some power islands on the
> third layer which were connected with traces on the bottom
> or top layer.  The complete return current should use the
> ground plane (which has an lower impedance) and not one of
> the small power islands. 
> 
> Would there be an impedance change for the signal traces
> changing the layer (top to bottom or vica versa) when both
> inner layers will use an ground plane where the signal is
> running? 
> 
> 
> x----------|                      (top layer - signal
> layer)
>     GND   |   GND            (second layer is a complete
> ground plane)
> Power    |   GND            (ground and power islands)
>               |---------x         (bottom layer - signal
> layer)
> 
> The line will show a signal trace changing from the top to
> the bottom layer. Both ground planes using at the inner
> layers, will be connected together by many vias. Could you
> tell me if this would be a good decision improving signal
> integrity? Are there any kind of disadvantages?
> 
> 
> best regards
> Daniel  
>     
> 
> 
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