Hi All, My question is about DQS interface between DDR DRAM and ASIC. Our current design uses a single 32 bit wide DDR DRAM with one DQS between DRAM and ASIC. I have to replace the DRAM with another type of DRAM with 4 DQS signals, and make it work with the single DQS pin on the ASIC. Is there someone who has tried this before, and is it something which can be achieved with simple glue logic. Can I just use a quad bidirectional transceiver on DQS lines between ASIC and DRAM, shorting the four I/Os together on the ASIC side, or will this require a more sophisticated solution. I will have to adjust the Data signals to match with the extra delay and capacitance on the DQS. Thank you very much in advance. Regards, Ravinder Server PCB and Flex Development Hitachi Global Storage Technologies Email: Ravinder.Ajmani@xxxxxxxx ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: http://www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu