[SI-LIST] Re: (no subject)

Here we go again. Unless you are dealing with 100ps edges (unlikely if you
have 2.5V signals), the image current on the 5V plane will return through
the plane capacitance between the 5V and gnd pair that sandwich the
stripline. Discrete decoupling caps or even planes on the other side of the
5V plane will not have low enough impedance to make a difference. For normal
SSTL DDR buses, the plane capacitance should have low enough impedance for
the image current from the 5V plane to return through the gnd plane. No big
issue.

 -----Original Message-----
From:   Girish Bangalore [mailto:bvg@xxxxxxxxxxx] 
Sent:   Monday, March 11, 2002 9:32 PM
To:     Goutham.S@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject:        [SI-LIST] Re: (no subject)


Goutham,

The 2.5V signal's return current needs to find the shortest path back to
it's source to reduce EMI and noise issues. That is possible if only either
a common ground plane or the 2.5V plane is adjacent to this signal. If you
any have other plane like the 5V then the return current has to find a path
thru' the 5V plane and will have to take a circuitous path. Effectively
increasing the inductance of the path traced which is not desirable.  One
way to reduce this "long path" is to couple the two power planes thru' small
capacitors so as to provide a easier path for these currents. Which will
enable you to have a 5V underneath the 2.5V signals only if you have no
other choice should you resort to this.

I do not know the answer to the second question.

Girish
----- Original Message -----
From: <Goutham.S@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Sunday, March 10, 2002 10:36 PM
Subject: (no subject)


>
>
>
> Hi,
>
> Can any one explain why the following things normally system designers
> follow/prefer:
>
>
> 1.0  2.5V signals should refer only to 2.5V or GROUND PCB plane and not
3V/5V
> plane.
>
>           >-----If 2.5V signals on signal layer are having 5V reference
plane
> adjacent to the signal layer then what is the problem?
>
> 2.0  Ethernet PHY signals should refer to only transformer secondary
supply
> voltage PLANE.
>
>           >-----If System designer ignores the above point what will
happen?
>
>    I feel the first point is meaning less for single ended traces (because
for Z
> control just plane is required), what  you say?
>
>
>
>
> Regards
> Goutham Sabavat
>
>
 
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