[SI-LIST] Re: min/max trace length

Hi,
Unfortunately, I`ve no simulation tools... and therefore I read a lot of
datasheets and application notes from different manufacutres. Their
recommendation about different trace lengths are very often between 10mm and
20mm. Maybe that`s the best conditions on the one hand to be routable and on
the other hand....

What about the skew and jitter calculation? I`m working with an ARM9
microcontroller with internal sdram controller and an external sdram. Is it
correct that the clock length have to be as long as the longest databus
length to get small skew

>Of course, if you mean a synchronous interface, you may need a simulation
and timing calculation to determine the trace lengths.
The pcb layout software is able to calculate the normal length of a trace /
not the manhatten length - but it should be enough

best regards
Bernd


2008/8/13 Benny Yan <zyan@xxxxxxxxxx>

> Bernd,
>  Setup and hold margin are the results from the layout length, output delay
> and input setup and hold time requirements.
> I think that you mean a source synchronous interface. In this case, the
> absolute trace lengths are not the main constraint.
> The setup margin 2ns and hold margin 0.8ns gives you a chance to tune the
> length matching between clock and data traces.
> Of course, if you mean a synchronous interface, you may need a simulation
> and timing calculation to determine the trace lengths.
> Or simply, you may use 1ns per 6inch to do a rough estimation, but don't
> forget to reserve enough margin.
>
> Benny Yan
> www.iometh.com
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of bernd schuster
> Sent: Wednesday, August 13, 2008 5:13 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] min/max trace length
>
> Hi,
> I often read minimum and maximum trace lengths in datasheets of sdram chips
> (for example). As I figured out the length depends on the setup margin and
> hold margin.
>
> If I have a setup margin of 2ns and hold margin of 0.8ns (e.g.)  - which
> formulas will tell me the min. and max. trace length? The system is working
> at 100MHz with a fall time / rise tim of 2ns.
>
> How do I have to modify the formula when I want to calculate the timing for
> an external flash memory (without clock traces)?
>
> best regards
> Bernd
>
>
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