[SI-LIST] Re: high ESR caps

TDK just announced last week caps with settable ESR:

http://news.thomasnet.com/fullstory/540513

    -tom=20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ray Anderson
Sent: Tuesday, February 26, 2008 3:03 PM
To: si-list@xxxxxxxxxxxxx
Cc: Joel Brown; Ray Anderson
Subject: [SI-LIST] high ESR caps

Joel-

I've changed the title of this thread so as to not have it mixed in with
the other ongoing discussion.

Check out the following two papers (and perhaps several others) on
Istvan's web site that deal with the issue of controlled ESR decaps.

http://home.att.net/~istvan.novak/papers/EPEP2004_controlled-ESR.pdf

http://home.att.net/%7Einovak/papers/DCE07_TF-MP3_SUN.pdf


Ray Anderson
Xilinx Inc.


> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Joel Brown
> Sent: Tuesday, February 26, 2008 2:04 PM
> To: 'steve weir'; leeritchey@xxxxxxxxxxxxx
> Cc: 'Scott McMorrow'; 'QU Perry'; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup =3D20  While we=20
>are all talking about bypass caps, I just got done reading a
book
> by Bruce Archambeault called "PCB Design for Real-World EMI Control".
In
> the
> book there is a chapter on bypassing and it shows measurements from
actual
> test boards. In one case, a certain percentage of the caps are "high
ESR"
> which seems to result in substantial damping (reduction) of the =20
>resonances.
> The high ESR caps are described as ceramic capacitors with a series =20
>resistor  built into the package, I have been unable to find such a=20
>part. Has  anybody  found a benefit to this approach and a source for=20
>high ESR capacitors?
>=3D20
> Thanks - Joel

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 =20

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